September 17, 2007
Agilent EEsof, High Frequency Leader
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How would you describe you target market?
It is really high frequency design and then there are traditional areas such as microwave, RF and communications. But there is a new segment that is pretty interesting, called signal integrity. It is the digital designers. With the new high speed digital waveforms and connection rates, they are running into basically microwave problems. They are looking for solutions. We have some great technology plus we can link in with our instruments, in this case high speed digital oscilloscopes to help customers do eye diagrams in an EDA tool and in the real world. Through this connected solutions they can do a real world – virtual world compare. It is pretty exciting stuff.
Moore’s law is really pushing our customers toward the microwave area and the analysis products that we’ve got.
The market for your products is growing because your customers are moving to higher frequencies and/or because companies that have not traditionally been customers are now seeing a need for your products.
Yes. It is more of the second. There are more customers that are struggling with these high frequency problems, customers doing digital designs. So, what is the effect of a connector? People what to know what the S parameters of a connector are. How can I use the S parameters in a time domain simulator? We have invented some new technology to transform the S parameters to time domain. How do you model PC board traces, 3D packages, and bond wires? These are all really tough challenges that customers designing new high speed digital products are struggling with. Even connector manufacturers and PC board manufactures. It is a new challenge as the frequency keeps going up.
Who do you see as your principal competitors?
It depends upon the market space. We have different offerings in different segments of the market. Most of our competitors are more narrowly focused. We find a number of them in RFIC. We have some competition with Cadence simulation. There are a couple of startups going after some of the simulation areas. In microwave there is AWR (Applied Wave Research). In 3D EM there is Ansoft and CST.
Several years ago EEsof established an alliance with Cadence. How is that going these days?
Good question. We did an alliance with them to bring the RF and microwave technology into the RFIC space to address some of the analog challenges that customers in a Cadence design flow were experiencing. That alliance worked out very well for us and I believe for them in that it gave their customers better access to very powerful high frequency simulation and to better modeling tools.
Part of the challenge of an alliance is the sales force. Sales people do not like to share accounts. That’s was always an issue with the alliance. But as far as the customers’ perception of it, it has been very strong. In fact the alliance was formed when three major customers independently within a short period of time brought Agilent and Cadence together and said “Given the challenges in this marketplace and the challenges with this technology we need you guys to work together.” There is always that pressure out there. The joint solution is in all the major RFIC vendors. It has a very fast adoption rate. It is a very strong part of our business.
Customers rely on it to get their jobs done. It’s been good for Cadence, good for Agilent and good for our customers.
Do you have any similar alliances with other EDA firms?
We formed partnerships with all the EDA firms. We talked about Cadence. We also have strong relationships with Cadence on the board side. A lot of customers using Cadence board products want to be able to access the high frequency technologies. There is a company in Japan called Zuken. We have a relationship with them mostly in the Japanese market for board tools and linkages with our technology. We have a long standing relationship with Mentor Graphics especially with Mentor’s board products. Synopsys, we just announced some work with them to support their level 66 models in their HVMOS (high voltage complementary metal oxide semiconductor) modeling process where we are using our
IC-CAP product. Again, we stay focused on our high frequency technology, products and analysis tools. We really look for where we can make it accessible to customers.
Would you give us an overview of the EEsof product portfolio?
Starting at the high level or system level designs here we have a number of different technologies. One is called Agilent Ptolemy. This comes out of UC Berkeley. It is somewhat of a standard in this area. Inside ADS you can do system level co-simulation with digital, analog and RF. Very powerful! It is the basis for us doing the wireless libraries and giving customers the ability to do top down design and partitioning. When we acquired Eagleware, they had just acquired a company called Elanix. They have a product called SystemVue. That’s a smaller product focused on system level design but it is not linked in with circuit tools. That’s another type of offering at the system design level. Then we have RF and microwave design which is ADS and Genesys which comes out of Eagleware. In RFIC design we have RFDE and GoldenGate which we acquired from Xpedion. That is a very powerful technology for large RFICs with extracted views. The RFDE part of that offering has a lot of system workbench so you can send in those wireless protocols through the Cadence design flow. It is a very powerful way to put a 3G signal into your simulation environment and get a bit error rate test going. We are planning to merge those products into one platform based on GoldenGate where it will be a superset of all that plus have phase lock loop simulation and a very strong design for yield. It is like a cockpit around design for yield. What customers are using it for now and what we want to make even easier in the future is the ability to run multiple simulations through a Monte Carlo simulation based upon process variations. This turns out to be an important and difficult problem for RFIC designers because as the silicon processes go down to 90 nm and below the variations in the process start to really increase. The designers need to run more and more simulations with the changes in process variables. So some of our leading edge customers are spending a lot of energy around this area because they want to get not just the first pass success but first
pass yield up so that they can get to chip volumes and drive cost down as quickly as possible. We are putting lot of effort into the whole RFIC area around that.
I talked about the connected solution where the instruments and EDA link together. That is one of our platforms. We have a number of platforms in our electromagnetic area. We have the Momentum platform which is planar 3D focused on planar structures like PC boards and chips. Then we recently introduced a product called EMDS (Electromagnetic Design System) which is based on finite element. We also introduced AMDS (Advanced Modeling Design System) which is based on finite difference time. Those technologies are exciting to help customers again as the frequency goes up structures like a bond wire, a package or a connector become very important things to model in your circuit. Designers
need to understand the effects of those as accurately as possible.
Our last platform is our device modeling platform, IC-CAP. This is a very powerful product to allow customers to model their semiconductor processes. It is the foundation for forming the physical design kits at foundries. This product has recently undergone some big changes in its user interface and its productivity. We focused on foundry modeling productivity and found that we could radically improve that almost by a factor of 5. This has led to a number of the major foundries around the world basically standardizing on it and making it part of their entire modeling flow, not just their RF. It goes all the way down to their DC and analog modeling. It is a very powerful technology. That
covers all the platforms.
Fairly broad portfolio. The EM product was just announced and some kind of antenna modeling product.
Right! The antenna product we call AMDS that is the finite difference time. That’s where we found huge challenges with handset designers in placing antennas. As you look at the new handsets, maybe the Iphone or the classic Motorola RAZR phone, there are upwards of 4 to 5 antenna. The designers need to embed them in the product. They actually use the metal on the products as part of the antenna structure. Being able to model the entire package and the antenna and to understand where to place them, how to prevent them from interfering and the challenges with multiple antennae and
reflections is very complicated. We have come out with that technology in the first product that is really focused on antennas because it is a very difficult and focused problem that customers are having right now.
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-- Jack Horgan, EDACafe.com Contributing Editor.