August 13, 2007
Jim Solomon: Burning Intellect, Restless Man
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

is offering its first user community workshop on Monday, August 13th, in the Stata Center at MIT. The workshop is being hosted by the university and, per the Press Release, “will offer a forum for users to describe their experiences using Bluespec and to showcase the different ways in which Bluespec is being used … Hardware designers and software developers from large systems and semiconductor companies worldwide, and members of academia are expected to attend.” Sounds fun, but hurry because it’s happeneing today!

Cadence Design Systems and Faraday Technology Corp. announced that Faraday has adopted Cadence system-in-package (SiP) digital co-design technology. Apparently, “This technology strengthens Faraday's substrate design capability and enables the company to provide SiP implementation capability to the market.”

Carbon Design Systems named Thomas Rathje as Vice President of Engineering. He succeeds Josh Marantz, who moves to the role of VP of R&D. Rathje has 25 years’ experience, including roles at Quickturn, acquired by Cadence, and Chrysalis Symbolic Design, acquired by Avanti where Rathje was GM of logic products. Prior to Carbon, Rathje was VP of Engineering at Timelab. He also worked as a consultant for Hostler Design Associates and was VP of Product Development for Spring Tide Networks, acquired by Lucent Technologies. Rathje began his career at IBM as staff engineer, moved to Amdahl and RISE Technology Company before joining Chrysalis. Rathje has a BSCE
from Rensselaer Polytechnic Institute, and completed an executive program at Stanford's Graduate School of Business. He also has a large set of legacy business cards.

Certess, Inc. announced that Juniper Networks is using Certess’ Certitude, described in the Press Telease as: The first commercial functional qualification software product for companies developing SoCs or integrating IP blocks. Certitude certifies that if a semiconductor chip design had a bug, it would be found.”

Denali Software announced that it has become the “exclusive commercial provider of simulation models for memory devices” made by Samsung Electronics Company, Ltd. Per the Press Release: “Under the new arrangement, Samsung extends its participation in Denali's Memory Vendor Program.”

eASIC Corp. and Avnet ASIC Israel (AAI) announced a partnership to deliver eASIC's Structured ASIC technology to the Israeli marketplace. Per the Press Release: “Under the agreement, AAI will provide design, technical and sales support to customers using eASIC's products in Israel.”

Innovative Silicon announced that Hynix, the world’s second-largest DRAM maker, is licensing ISi’s Z-RAM technology for its stand-alone DRAM products. Z-RAM is a single-transistor bitcell that requires no capacitor or “exotic” process changes. Based on the license agreement, Hynix will have the right to use ISi’s technology to build memories. Per the companies, the license fees and engineering fees comprise an “8-figure deal.” In addition, Hynix will be paying royalties for use of the ISi technology once production or products that incorporate the technology begins. Per the Press Release: “Both companies will invest
significant engineering resources to ensure the success of this program.”

Sung-Joo Hong, VP of R&D at Hynix is also quoted: “Z-RAM promises to provide an elegant approach to manufacture dense DRAMs on nanometer processes. We see the potential to create a new platform of products based on ISi’s innovation of Z-RAM that will help us maintain, and grow, our leadership position in the memory market.”

IPextreme announced three new sales representatives, Maojet Technology Corp., Progate Technology Ltd, and Sital Technology in Taiwan, Korea and Israel, respectively.

MathStar, Inc. announced its high-definition MPEG-2 Encoder IP Core for the Arrix FPOA, which supports high-definition 720p resolutions at 60 frames per second, as well as all standard definition formats. The company says the core was co-developed with Adaptive Micro-Ware. Per the Press Release: The MPEG-2 Encoder IP Core is part of MathStar's Pro Video Library … [and] is scalable across one or two FPOA devices, depending on the level of compression required. The IP core will also be enhanced to support 1080i formats before the end of the year.”

the start-up focused support vehicle for Mentor Graphics to assist European electronics start-ups, announced the donation of EDA software worth GBP 2.5 million to the Computer Architecture Research Group of Imperial College London. The donation includes software for everything from design and verification for SoCs, to PCBs and embedded software.

Oskar Mencer, EPSRC Advanced Fellow and head of the Computer Architecture Research Group at Imperial College, is quoted: "We are excited to have been selected by Cre8Ventures as the London hub for academic use of Mentor Graphics EDA tools … Cre8Ventures' support will enable us to keep our research highly relevant to current challenges in industry."

Mentor Graphics has provided Michigan’s Kettering University ECE Department a suite of software valued at more than $1 million that can be used to model, simulate, verify, and synthesize electronic systems. Per the Press Release: “These tools enable students to design and analyze distributed mechatronic systems before they are manufactured. Mentor is providing these resources through the company's Higher Education Program (HEP), an endeavor founded in 1985 to further the development of skilled engineers within the electronics industry.”

Mentor Graphics has also signed an agreement with the Lahore University of Management Sciences (LUMS) in Lahore, Pakistan to create a 3-year Mentor Graphics Chair for Embedded Systems. At LUMS, Dr. Shahid Masud, will be the focal point for this initiative in embedded systems. Mentor Graphics will also help LUMS to design and improve the curriculum for computer sciences degree programs.

Dr. Zahoor Hassan, Vice Chancellor of LUMS, is quoted: “This agreement with Mentor Graphics will not only help develop state-of-art projects at LUMS in this important domain, but it also will lead to the promotion of industry-driven research in Pakistan.”

Nanno SOLUTIONS announced Kejing Song, an investor in the company, has been named President and CEO. Song has 19+ years’ experience in the industry, including time served at Cypress, Zycad, Lattice, and Sandisk. He has a BS in CS from U.C. Berkeley.

SynaptiCAD released version 12.0 of its compiled-code Verilog simulator and graphical HDL debugger, VeriLogger Extreme. New language features include support for switch primitives and Verilog-2001 generate statements. New debugging features include signal and expression breakpoints, improved syntax checking and error reporting, and more features for navigating the source code using design information. New testbench generation features include faster Verilog code generation and support of analog test bench signals for Actel's mixed-signal Fusion FPGAs.

Synopsys announced selection as Intel's “primary EDA supplier.” The terms of agreement have not been disclosed, but per the Press Release: “The two companies signed a multi-year, expanded commercial and technology agreement under which they will closely collaborate on advanced design flows that combine Synopsys' breadth of EDA solutions with Intel's technology strengths and design expertise. The agreement expands a long-term relationship between the two companies.”

Synopsys CEO Aart de Geus is quoted: "Taking our long-term relationship with Intel to the next level is a milestone strategic move for both companies. It has always been Synopsys' strategy to work closely with other technology leaders with one clear objective: lead in the state-of-the-art of modern design. By teaming up with Intel, we will jointly drive forward a whole new phase of Moore's law's evolution."

Taifatech announced they reduced development time on their wireless Ultra-wideband (UWB) chip design cycle by 30 percent using Cadence’s RF Design Methodology Kit. Taifatech would like you to know that “UWB wireless technology is used for transmitting information spread over a large bandwidth (> 500 MHz) and its main applications are in the wireless, consumer electronics and personal-computer markets.”

Verdant Electronics announced new “evolutionary” technology for both PCBs and Printed Circuit Board Assemblies (PCBAs), which the company says “promises to dramatically improve the way electronic products are made … The core idea is to build and interconnect electronic assemblies in reverse order from the traditional methods. Rather than having components mounted on PCBs and soldered, fully tested and burned IC packages and components of all types are placed on a carrier, encapsulated and subsequently plated with circuits making direct connection to component terminations without solder.”

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-- Peggy Aycinena, Contributing Editor.


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