August 06, 2007
It’s the Network Stupid, the Network-On-Chip, that is.
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resources for the communication requirements, spits out the NoC instance in RTL which goes directly into Synopsys or Cadence synthesis tool.
Is there one NoC instance per SoC?
Yes! On a chip you have the memory, processor, video engines like JPEG and NPEG, the audio stuff and some analog stuff. Then you have the interconnect. We provide about 10% of the chip with our latest product.
Three products: library, explorer and complier.
There would also be methodology. We have know-how on how to improve the architecture for data communication. We share this methodology with our customers. These are specific to multimedia, telecommunication and wireless SoCs.
Do you charge for sharing this methodology?
No! It comes free with the tools and the library.
What is the pricing and packaging for you products?
We have two basic models. One is a license plus a royalty. The other business model we have is a pure license model. We give the customer the option to either pay for NoC from the gross margin where we share the risk with the customer or from the ?
Which is more popular?
The license model is more popular.
The sweet spot is SoCs in the multimedia, wireless and telecom industries. Typically 90nm or below at around 200 MHz in terms of frequency and more than 15 to 20 IPs. It is basically a complexity threshold where the NoC adds a lot of value. People have SoCs with smaller complexities than that but the NoC at some level of complexity becomes completely essential and this is a kind of break point.
The NoC has a layered architecture.
It is like a network, the standard 7 layer protocol except scaled down. We use three different layers to isolate the IP from the data communication. We isolate each layer from each other. Not only is the NoC approach more wire efficient and more power efficient, it is also more reliable.
The three layers are the transaction, transport and physical layers.
The Transaction layer typically happens when the signal is packetized. The transport layer routes the packet through the switch fabric. The physical layer is the wires.
Greater reliability comes from using layer appropriate approaches?
Correct. It is pretty much the same in the office environment. If you have a cable connection and a communication problem anywhere along the wire, you have a major problem. Whereas a network basically allows does not impact others. You can do error correction. You can do all sorts of tings. You can do Quality of Service determination where some packets have higher priority than others. You have all kinds of flexibility.
Do you have any concerns about protecting your intellectual property?
We deal with some of the largest corporations in the world. They typically have pretty good IP protection. We also have some protection schemes inside our things. The technology is protected by patents. We have not had any issues in his area.
Do you have a roadmap for Arteris’ future direction?
Yes! Basically our goal is to make network-on-chip more and more important as the level of complexity increases in SoCs. We think that the network-on-chip will be the most important part of the SoC in the future. We are bringing together technology functions every release that will allow us to get there.
From a sales and marketing point of view, how do you go about increasing the market given that Arteris is the only company in it? Is it still a missionary sale?
Absolutely, it is still a missionary sale, brand new technology. We have to sell directly except in Japan. We sell with very qualified support people. We get involved with the projects themselves when the architecture is defined. It is a strategic missionary sale. But ultimately the market is very large. Over the next 6 to 10 years it will be almost a $1 Billion.
One of the challenges of a new technology is the degree to which the target user has to change. Change is always difficult. Change means risk. How do you convince people, particularly system architects, to move to a NoC approach for the next chip?
We have made some pretty good technical decisions. One of the significant decisions we made is that we will not impact the customer’s IP or the EDA flow. We can deal with Cadence, Magma and Synopsys unmodified. We do not make the customer change the IP. If you are using an ARM processor, an AMBer call IP using a MIPS processor with memory and memory controller IP from Synopsys or Denali those kinds of things do not have to be changed That makes the technology easier to adopt. The challenge is that the NoC has quite a bit of benefit in terms of improving the architectural performance over the bus so we get involved in discussions with the system architect about how to best take
advantage of the network-on-chip in order to improve the architectural performance of the SoC.
Is that because the cost if known and fixed?
The royalty makes sense in certain cases. It just depends on the situation. If you have a situation where the NoC enables the chip to exist, where there is a lot of business risk or there isn’t a lot of capital available then the royalty model makes sense. On the other and if you have a chip that has a very determined market share with customers for it so the business risk is very low then our customers would prefer the license approach.
Is there a target market or a sweet spot for you products based upon the end use application?
There are actually two types of target users. One is the system architect. The other users are the integration people. The first thing that is done for the SoC is the data communication architecture. So we get involved very early in the cycle. One of the last things that is done for the SoC is integration of the physical design. We get involved with the integration people. We also get involved with the verification people. Three groups inside the customer that touch this technology.
Would it be fair to say that the system architect would be the peon to make the decision to use this product?
From a technical perspective that’s correct. But it also winds up to be a strategic decision. We get involved with fairly high level executives as well. It is kind of strategic sale where you have to align the technical level and the management level in order to be able to proceed.
What benefits do you tout to the executive level?
It is things like much greater wire efficiency, lower power, higher system bandwidth, higher frequency of operation. At the strategic level it is really about time to market. We allow people to lower their design costs because with this kind of network-on-chip toolkit, you get your chip and particularly your derivatives out faster. We lower the cost of the design chips themselves because there are fewer wires. In the case of complex SoCs there are fewer gates and we lower project costs. There it is about economics and being able to deliver to your customer quicker. We have a more predictable methodology.
How do you prove to a prospect that your product does what you claim it does?
With typical benchmark. People want to know that there are some working designs out there. So we do it with tapeouts and with a benchmark say on an existing design or the last generation design.
What is the sales cycle with the typically customer?
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-- Jack Horgan, EDACafe.com Contributing Editor.
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