July 02, 2007
EDA Inside: From Late Republic to Imperial Zone
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Carl Schlachte, President and CEO at ARC is quoted: "SoCs for consumer applications are increasingly dominated by chips incorporating multiple processors along with IP from multiple sources. To address the design challenges of customers using these technologies, ARC now will provide its own 'Star IP' and software tools along with Tenison's technology to enable customers to create power-efficient, high performance, and low cost SoCs. This will enhance ARC's ability to service customers using ARC subsystems and cores as part of an SoC design that includes other design components."

In related news, ARC announced an engineering center in Cambridge, England, and the appointment of David Greaves to ARC's Office of the CTO. Greaves is a faculty member and lecturer at the University of Cambridge Computer Laboratory, a Founder of Virata, and Founder and Chief Scientist of Tenison.

ARC then announced new development tools. The company says the new ARC xCAM tool provides cycle-accurate models and is based on technology acquired from Tenison. Per the Press Release: "The two new ARC xISS (instruction set simulator) tools operate up to 100x faster than previous versions. The xCAM and xISS products will help ARC customers more easily and quickly create and test software earlier in the SoC design cycle, thereby speeding time to market of customers' chips."

Agilent Technologies announced an integrated verification toolkit for signal integrity design for use with the company’s ADS EDA software platform. Per the Press Release: "The new toolkit identifies and analyzes sources of performance-degrading jitter in multi-Gigabit communication link designs. It helps designers find and remove the causes of jitter before hardware prototyping begins, eliminating costly redesign later in the development cycle."

Agilent also announced its Antenna Modeling Design System (AMDS), which the company describes as "a 3D, dedicated design, modeling and verification tool for antenna systems and placement" AMDS simulates a wireless appliance in its environment and helps assure compliance with regulatory and operator demands including over-the-air performance and SAR (specific absorption rate). Research In Motion has adopted AMDS for R&D purposes.

Apache Design Solutions announced that TMSC's
Reference Flow 8.0 includes Apache's RedHawk-ALP for power integrity of switched
memory. Sahara-PTE for thermal integrity including stacked chips, and  
Sentinel-CPM for IC-system power

Zuken announced Gerhard Lipski is "the first Western member of the company’s corporate board of directors. This appointment is in recognition of the growing global importance of Zuken’s Western market, which under the leadership of Mr Lipski, has seen revenue rise by a massive 41 percent during the last three years." Lipski has been with Zuken since 1997, and is currently President and CEO for Zuken Americas.


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-- Peggy Aycinena, EDACafe.com Contributing Editor.


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