June 25, 2007
High Frequency – Applied Wave Research
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Conceptually when you have to model them, if the designer was starting at the beginning and just modeling it going forward but the ability to take a design and analyze it automatically and generate the models needed to simulate was not anywhere in the marketplace. This was the type if thing we wanted to create. We call it ACE for automated circuit extraction technology. What it does is look at the circuit the way the designer laid it out and try to figure out how to decompose that into a set of simulation models that can be used very early in the design process long before the whole design is committed to being finished and tell you what the probability is that it is going to work later. Without ACE what people have traditionally done is to wait until they are completely done, then they can take the entire circuit to an electromagnetic simulator like HFSS or Momentum and run a very large em simulation that could takes hours or even days. Then get a go/no-go. When it comes to making circuits work, these kinds of go/no-go answers are not really the best. Having a way to do it much sooner, long before you are done, and to be able to do it interactively so that you can actually move things around, seeing what the effects are, learning how the circuit really works and what you can do to compensate for all those parasitic effects is
very important. So we are really excited coming out with ACE because it moves much sooner in the process the ability to find out whether your board is going to work.
On the RFIC flow we run into the same sort of thing. The extraction tools today for parasitic extraction on silicon design, RFCA designs really wait until you are completely finished the design. Then you go and analyze the parasitics. There is a company in Greece called Helic who started working on some simulation tools to look at RF chips and extract them in a much more RF centric way, looking at spiral inductors and specialized components that are used in radios and creating the kind of technology to be able to model these kinds of things. The problem they always have had in deploying the tool, the thing that makes them much less valuable in the Cadence flow is that in order to use them, you almost have to be completely done with your design. Again you have that verification problem where it will give you a go/no-go about whether the circuit works but it gives you it so late that the cost of going back and fixing those problems and redoing the layout just is not practical and it costs too much design time. What we are able to do because architecturally our system is very different, is to use that same extraction technology but much earlier in the design process. You can start running it when you are 2% or 10% complete with your design instead of waiting until you are 95% complete. Being able to get those effects much
sooner in your design process, allows you to use it a design aid rather than a verification aid.
So far we have talked about the implementation side of design, taking concepts that people have and actually designing hardware with it. As you get more and more wireless devices, a lot of the design is just conceptually architecting what the radio should do. Someone designs a new mode of communication. One of the great ones I saw was a little transmitter that could change a PowerPoint slide. That doesn’t use Wifi to communicate to the projector. They created their own protocol for sending bits back and forth to tell it what to do. A lot of that work had been done in tools like MathLab and spreadsheets or just on paper trying to decide just what these protocols should be. Up until we came out with VSS (Visual System Simulator) there wasn’t any tool specifically geared towards communication systems to allow you to create new architectures, to decide what your block diagram should be long before you get to the implementation side, actually figuring out how you should be creating these systems. We released VSS 5 or 6 years ago. It has been evolving but there has always been the next step from having a block diagram to actually doing an implementation of selecting your frequencies, selecting which bands of operation you want to use and how many different wireless devices in conjunction would interfere with each
other, We’ve added capability to VSS that helps you perform more experiments about how different things would interfere with each other and what the frequencies going through your radio would look like to see what type of interference you could expect if you design the radio a certain way, how much it will be isolated from interference from other things. That’s a new capability we released that is pretty exciting to a person who has to look at six or seven different wireless things coming in and how they are going to impact each other and what can I do to my block diagram to isolate myself from all those other things in the system.
In summary we have been focused on designing a system that is truly geared toward wireless EDA and creating wireless systems and because of that focus we have been able to create some unique innovations, a unique way of creating systems that you just can not do with traditional EDA tools. A lot of it comes from being able to have a different platform architecture, having the experience in the design community, having been designers to know exactly what to do, being willing to work with people but having the best technology so we can help our designers with any problem they have, having the complete flow, and having the cockpit so that they can do all of the design work
Sherry, you have been quiet.
I just joined the company.
Where did you come from?
I’m from CebaTech, a startup that specializes in ESL and telecommunication IP. They ran out of cash. Before that I spent many years at Ansoft.
What attracted you to AWR?
I was always attracted to them but at a distance. Having met the team and their focus on the customer and doing what is right and productivity, I think they have a winning cooperation. It was an easy decision to make.
Jim: She has been her three weeks.
Sherry: A month.
Jim: Are you excited?
Sherry: Very excited. I feel guilty, I am so excited. You should not have so much fun going to work everyday.
Jim: She has dug in and started learning about what the team has got.
Sherry: It is really a team. When the show ends, we are actually all together to 2AM.
Other than EEsof is there anyone else in this market place that overlaps AWR?
Jim: Cadence dabbles. They are coming up from low frequency towards RF. They have a lot of tools to help you assemble a final chip but they have done it largely by partnering. They partnered with Agilent. That has cooled for some reason. I have no idea why. It is a weak partnership now. I don’t know who was doing the selling. It was probably Agilent. There is no other significant player. These are the only guys keeping the whole thing honest. There is only one big guy. That is not a good thing.
Unless you are that guy
You can only go down.
The growth of this company is somewhat limited by the constant battle with Agilent. One issue for us is that customers of wither company are testing their designs with Agilent equipment. So they are in our accounts with hardware.
Jim: The big companies in EDA tend to move very slowly. The little guys tend to do the innovation
This is true because?
Jim: People get very comfortable in the big companies. They have a lot of legacy code. So to go to a new generation they have to worry about that. These guys started clean, later in the game. It is a third generation. Their architecture is superb from an engineering software point of view. It is really a unified data base. They are the only analog flow where the electrical and physical stiff connects through the data base nicely. With OpenAccess this will probably happen eventually in the analog world. In fairness it is easier to do analog because the blocks are smaller. You can do more fancy
stuff. These systems are very nice. They do a lot of handholding.
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-- Jack Horgan, EDACafe.com Contributing Editor.
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