June 11, 2007
Visual Architect and Development System for Architectural Exploration and Performance Analysis - CoFluent Design
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
The high level appeal of ESL is very strong. As you have said, if you can detect a problem in the architecture upfront with minimal investment of time and effort, then you can reap substantial benefits. The payback can be enormous. It begs the question of why ESL has not been more successful than it has been. I can show you 20 year old slides from the mechanical CAE industry that shows this kind of potential. The appeal to C-level executive is clear.
Hagay: That has got to do with the challenge of adoption in the various markets. It is a very sexy message. It takes time to detach people from the traditional design flow to unleash the creativity that ESL can provide and take full advantage of it. What we find is that customers most of the time are driving full speed on their highway of design. They are in the process for years. They are successful in most cases.
Slowly they are adopting and taking more advantage of the promise of ESL. It is a process. It starts with education. This is how they teach system design today. I agree with you that you can find 20 year old things about this concept. In the last few years especially with the growth in the use of SystemC as a modeling language we are stepping up in abstraction and we learn how to take advantage of those system level capabilities. I am very hopeful in the next couple of years there is going to be a breakthrough in that area.
Vincent: You are right when you say that codesign is not new. Professor JP worked on this topic for almost 20 years. This is not new but what is perhaps new is the level of pain that the projects are under today. Until now they could be more or less successfully get to the end of the project with existing practices such as the Excel spreadsheet. But when it comes to SoCs going out to the marketplace today or very complex mobile terminals, it is becoming too complex for a human being to analyze the ins and outs of the different situations that the system could be in. When customers maybe five years ago would tell us that their architects are right 90% of the time with their decisions, now they are coming to us saying their architects are very often wrong because it is becoming too complex. The complexity is here. They do not have a choice but to adapt and embrace a new way of thinking about their designs and analyze the different situations and the different choices that are available to them in order to optimize the architecture and the products they will release. ESL is part of the answer to these problems. It is clearly illustrated by the various statistics that you find in the marketplace. You see that the most important problems are at the architectural level and functional level. They have moved from implementation related problems that were solved by the existing
EDA technology to the earlier phases of design. This is the challenge of ESL to address.
The top articles over the last two weeks as determined by the number of readers were:
Cadence Design Systems, one of the largest makers of the software used to design computer chips, is in talks with at least two buyout firms about a possible sale of the company, two people close to the matter said yesterday.
The company has held talks with Kohlberg Kravis Roberts and the Blackstone Group, and other suitors may emerge, those people said. But they warned that a deal may not happen because of the complicated risks in the company's business. Other private equity firms took a look at Cadence but passed.
Representatives for Blackstone, Kohlberg Kravis and Cadence declined to comment.
Extreme DA at the 44th DAC: It’s Time for a New-Generation of Timing Sign-Off and a Chance to Win an Apple iPhone! Extreme DA will provide informal demonstrations of its new GoldTime product featuring Extreme's new ThreadWaveTM technology for the fastest, highest capacity timing closure.
print functionality into new and existing websites. The toolkit is based on custom template technology developed by Tabblo, a company HP acquired in March.
HP has also added eight imaging and printing solutions to its enterprise portfolio targeted to customers in the higher education, public sector, retail, transportation/logistics and financial services industries
Avago Technologies Announces Second Quarter Fiscal 2007 Financial Results Avago Technologies, a supplier of analog interface components for communications, industrial and consumer applications, today reported financial results for its second fiscal quarter, ended April 30, 2007. Net revenue increased to $386 million, compared with $384 million in the previous quarter and $373 million in the same period a year ago.
Denali Softwareand Mentor Graphics announced the availability of Denali's PureSpec(TM) verification IP products that are integrated with Mentor's AVM (Advanced Verification Methodology) SystemVerilog environment. The integration is a result of a collaborative effort between Mentor and Denali to address the rapid migration towards SystemVerilog in their respective customer bases. Commercial verification IP products for AVM-based environments enable designers to more effectively use key SystemVerilog functionality, and drastically reduce verification cycle times for designs that incorporate standard interfaces such as AMBA, PCI Express, SATA, and USB.
Other EDA News
CLK Design Automation Links Verific Hardware Component Software to New Amber Timing Analysis Solution
Synopsys Honors Unified Power Format Collaborators With Seventh Annual Tenzing Norgay Interoperability Achievement Award
EDA Leaders Team With MIPS Technologies to Support New High-performance MIPS32(R) 74K(TM) Core Family
Trent McConaghy, Chief Scientific Officer of Solido Design Automation, to Participate in DAC Technical Session: Mixed-Signal Modeling, Methodology and Synthesis
Dust Networks chooses DOLPHIN Integration's unique Low Leakage memory to extend the performance of its Wireless Sensor Networking Products
ProDesign Introduces the CHIPit Platinum V5 and Reaches a New Level in High-End ASIC and SoC Prototyping
Reminder - Kilopass Shows Off Its Support of Advanced Process Technologies at the 2007 Design Automation Conference, Booth #3263
Reminder - Real Intent Invites Design Automation Conference Attendees to Experience Life at the Beach and Complete Timing Closure Verification for Design Sign-Off
AXIOM Design Automation Enhances MPSim Verification Solution to Support Interoperability With Magma's IC Implementation Software Through the Unified Power Format
Reminder - Accellera Invites DAC Attendees to Open Meetings and Events
Other IP & SoC News
Xceive and Trident Microsystems Partner to Deliver Copy-Ready Flat Panel TV Reference Design Platform for Mid-Large Screen TVs
ON Semiconductor Introduces HighQ(TM) Copper on Silicon Integrated Passive Device Process Technology and IPD Product Design Tools
Sonic Solutions Announces MediaTek Integrates Qflix Technology Into Chipset for Optical Storage Drives
Avago Technologies Debuts New High Brightness Infrared Discrete Emitters for Industrial and Consumer Applications at Computex '07
Luminary Micro and ARM Announce Stellaris(R) Evaluation Kits Featuring Integrated 10/100 Ethernet and CAN with ARM(R) RealView(R) Microcontroller Development Kit Software
Toshiba to Showcase C-, X- and Ku-band GaAs FETs, X-band GaN HEMT for Radar and Medical Applications, and RF Devices for Two-Way Radios and DTTV Tuners at MTT-S
ANADIGICS Powers Emerging Markets CDMA450 3G Cell Phones With Small and Efficient Linear Power Amplifier
Luminary Micro Launches 27 Stellaris(R) Microcontrollers Including the First Offering of Real-Time Networking with the ARM Cortex(TM)-M3 Processor
Broadcom VideoCore(R) Technology Powers the Industry's Most Extensive Reference Design Platform for Developing Next Generation Portable Multimedia Players
Broadcom and SoftMax Announce Collaboration on Noise Reduction Technology for Broadcom's Newest Bluetooth(R) Headset Solution
Marvell Announces Industry's Lowest Power Quad-Port Gigabit Ethernet PHY for Next-Generation Energy-Efficient Applications
RMI Announces Next Generation Au1250(TM) Media Processor and Au1210(TM) Navigation Processor in Full Production
AMCC Announces New Embedded Processor That Delivers Best-In-Class Price/Performance for Designers of 802.11n Access Points, Residential Gateways and Advanced Set-Top Boxes
Avago Technologies Introduces First Input Device Module With Multi-Mode Linear and 2D Navigation for Handheld, Computer and Set-Top Box Applications
Zarlink and 5V Technologies Demonstrate Collaborative Solution that Improves VoIP Voice Quality at COMPUTEX TAIPEI 2007
TI Enables Higher Density in Communications Equipment with Smallest Low-Power Gigabit Ethernet SerDes
Freescale LDMOS RF Power Transistors Optimize Performance of Wireless Base Stations Using Doherty Amplifiers
Broadcom Introduces Complete Media PC Solutions, Enabling Flawless Playback of High Definition Video on the Widest Range of PCs
IDT Low Power PCI Express(R) Switches Optimized for I/O Connectivity Named to the PCI-SIG PCI Express Integrators List
FS2 Introduces System Navigator(TM) Probe for Development Using the New Ultra Low Power Handshake Solutions Memory Extension HT80C51 Core
Stereo Power Amplifier Chip from STMicroelectronics Creates Impressive 3D Audio Effects for Mobile Phone Platforms
You can find the full EDACafe event calendar here.
To read more news, click here.
-- Jack Horgan, EDACafe.com Contributing Editor.