April 16, 2007
Virtual Hardware Models - Carbon Design Systems
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
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Carbon is a supplier of ESL tools to automatically create, validate, and deploy virtual hardware models generated from Verilog and/or VHDL descriptions. Carbon’s models are used in conjunction with SystemC simulation platforms to enable architecture profiling and software validation in parallel with hardware development. Problems can be found and resolved early in the design cycle, rather than waiting for prototypes to be built or silicon to be delivered. I recently had an opportunity to talk about Carbon with VP Alan Swahn.

Would you give as brief biography?

I started out in EDA with Daisy then went to Viewlogic both startups at the time. In the 90s I started in system emulation with Aptix. Bob Osann and I left Aptix and started LightSpeed Semiconductor, a California company. We were there for quite a while. I had always lived on the east coast. I commuted to California. I found my way back to Boston. I have been with Carbon for 4 years now.

Your title is VP of Marketing and Business Development. How does Business Development differ from Marketing and Sales?

A lot of it is partnerships and relationships with different companies which we do on a regular basis whether they are companies whose products we plug into or companies we deal with in the marketplace in terms of working together with common customers.

How and when did Carbon Design start?

I have been there for almost 4 years. The company was started a little before that. When I joined they had already had their first beta product. That’s where my history begins. Carbon started out essentially with a core technology of being able to take RTL which at that time was Verilog and compile that into high speed linkable C. That was the first product and the first mission. It has certainly expanded since that time. The vision it was founded on was to make a high speed cycle accurate model from RTL. The first implementation was compiling Verilog.

Where did Carbon’s founders come from?

Co-founder Bill Neifert, Carbon’s current CTO, had more than 10 years in EDA including C-Level Design and Quickturn Systems. He had been in high speed verification for many years. He has a BS and MS in Computer Engineering from Boston University.

When did Carbon start?

I want to get this right. I would say 2002.

I saw on the website that Carbon raised $5 million in series D funding.

We have had different rounds of funding. We have taken an aggregate of $25 million in venture funding.

How large a company is Carbon?

Carbon is a 37 person company. We have direct sales but we also have Carbon KK in Japan and reps in Europe and other parts of Asia.

Carbon’s first product came out in 2003.

We were in beta for 6 months or so.

Was the first product VSP, Virtual System Prototype?

No. It was actually Speed-Compiler. That is the product that compiles Verilog into high speed C linkable object.

When did VSP come along?

In terms of product growth the C object that was first generated could run standalone to represent the whole chip which could be many millions of gates. That first product was used for software validation, for hardware regression. What has changed is that we found there are lots of environments out there, a few very popular ESL environments. The cycle accurate models we generate have a lot of value in an ESL platform such as SystemC which was the first ESL platform we supported. Initially there was Speed-Compiler, the complier, and what we called DesignPlayer as the run time. What changed was becoming part of these platforms. We brought out VSP. We started to become part of
these virtual platforms. VSP supported SystemC in the sense that you could take the model that was generated and run it within a SystemC environment such as OSCI SystemC. What else happened in that timeframe, the VSP timeframe, was that we began to support VHDL and mixed level designs, that is designs that had both Verilog and VHDL. Now we supported two languages in terms of creating high speed models. We supported running standalone and running as models within a SystemC environment.

What followed after that in the chronology Carbon growing up, was that the use model changed so that we could run different virtual platforms. VSP brought us into the SystemC realm and also supporting both hardware description languages. Following that came SOC-VSP. Today we have SOC-VSP for ARM, for CoWare and for SystemC. This was the idea of plugging our models into ESL platforms with a very deep integration. The first one we did was ARM. We had basically SOC-VSP for ARM. You could take our model and plug it in as a transaction level model, still cycle accurate, but a transaction level model into an ARM environment. It would run with all the ARM models. When I say the ARM environment I am talking about their RealView SoC Designer. We could run in this heterogeneous simulation environment. What I mean by deep integration is that not only the models would communicate, run and help model your total system but also that you would have the visibility into the model and integration into their different analysis tools to provide things like model profiling, system profiling as well as waveform display, integration with their GUIs and so forth. We became a model within that platform in every sense of the word. They have particular cycle accurate interfaces into SoC Designer called CAPI, CADI and CASI. One is their debug interface, one is their profiling interface and one is
their simulation interface. We utilize these standard interfaces that ARM documents to integrate into ARM RealView SoC Designer platform. In terms of timeframe we came out with that in January of last year. We have been selling that product for over a year. They are of course, not the only virtual platform. There are others out there. One of the notable ones is CoWare’s platform Architect. We did a very similar integration with CoWare. They have their own ESL interface. We just announced that one. So we now have SOC-VSP for ARM, CoWare and SystemC.

How would you define ESL?

I do not know if I can completely define it. A lot of people have tried to define it. From Carbon’s perspective we are trying to provide cycle accurate models for the ESL platforms as defined by ARM, CoWare and SystemC. They have their own definitions. For us we view those environments as typically heterogeneous simulation environments. When I say heterogeneous I mean not just modeling things at the RTL level and bringing them into these environments but also being able to model things at the instruction set simulation level or behavioral level and combining these models together at the bus which is typically the transaction level. That’s the communication
mechanism, between these models. The ISS, the behavioral model and the Carbon model are all talking through the bus at the transaction level. How we see these ESL platforms is that they provide a simulation platform and different analysis tools such as debugging, profiling. Different vendors provide models. ARM has a set of models they provide or will sell you with their platform. CoWare has a lot of capabilities there as well. I do not know if I have answered your question. I was trying to give you a landscape view of where Carbon fits into “ESL”.

Who do you see as Carbon competitors?

We are not the only way to prototype hardware. A lot of people prototype hardware with FPGAs. That’s a common thing. Handwritten models either by a vendor or there are other “ESL” platform vendors that provide services to write models. I am thinking of other vendors in this space who provide ESL platforms for software development such as Virtutech or Synopsys Vertio. They provide high speed platforms for software development. In terms of competition we view it through how people have done their work in the past. Carbon’s strong point for ESL platforms, they have been able to bring RTL into these platforms. It was not really an option. There is a kind of warehouse of existing RTL out there. There is also IP that companies buy in RTL form and there is new custom RTL for their own designs. That’s what we enable to be brought into these ESL platforms. Without Carbon you are limited in terms of the kind of modeling you can do because you can not automatically bring in the RTL. You either have to hand-code something or rely on more abstract behavioral models. In terms of competition without an ESL platform or virtual platform, you are really talking about FPGA prototypes or hardware emulation like Mentor or Cadence. With the ESL platforms from CoWare, ARM, Virtio and Virtutech it changes to a software paradigm. You are creating everything in software typically running on inexpensive Linux workstations. Now it becomes a modeling problem. If you want to simulate your whole system you have to have models of the whole system. Typically there will be an instruction set simulator for the processor if you have a processor base design. Denali will provide memory models. Different vendors will supply models of peripherals, things like ARM Prime Cells. But in terms of the RTL content whether it is legacy RTL, vendor specific IP provided RTL or the new RTL you are
designing for you system, that’s what falls short for these ESL virtual platforms. That’s what Carbon does. We complete the missing link. That’s what is missing from these ESL platforms that are all in software running on inexpensive hardware. That’s what we bring to the table. You have to contrast to that what people have done in the past with emulators or FPGA prototypes, kind of the old versus the new.

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-- Jack Horgan, EDACafe.com Contributing Editor.


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