April 09, 2007
Dr. Tom Williams – A Lifetime of Achievement
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
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“Essentially, the test community was saying that they no longer wanted to deal with absolutely everything that was thrown over the wall at them, so back when I was at IBM the design team started having to be involved. They had to write test patterns, which was difficult for them because people assumed if they could design a perfect design, they could also write a good set of patterns.”

“The designers would give their patterns to the test people to take along with the design, but if the patterns and the chips failed at the tester it wasn’t clear if it was a zero yield, bad test pattern, or maybe the tester due to pins or probes that were broken. The manufacturer in charge would say to the designer, ‘Go fix that!’” “In order to do so the expensive tester would have to be taken out of production to debug this problem. The cost to the company was time and money. That’s when IBM started saying that the only kind of designs that were acceptable were ones with full scan, LSSD.”

Referring back to ITC, Tom continued: “Clearly, test has always been downstream, at the end of the process and there is still a little bit of that ‘provincial’ mentality you mentioned. However today DFT [design for testability] is really part of the whole design process. You synthesize the test and compression structures right along with the design. Even more importantly, DFM [design for manufacturing] and DFY [design for yield] are becoming part of the process. They fit right in with DFT.” “It’s true that some of the things being done in DFM today – things like the ability to do massive diagnostics and collect massive amounts of manufacturing
data – that kind of feedback and data collection is new. But certainly all along, test and diagnostics have played a key role in trying to get yields to levels that are more and more acceptable.”

Tom added: “Test is a really strange thing. If you look at the total number of bits, test is only requires between 1 and 5 percent of the bits be specified. Let’s assume that you only need 2 percent in order to cover your faults, and remember that we’re always going to do the same coverage, then no matter how you compress the data, you’ll never get below 50-to-1 compression. But there’s a certain entropy to the lower bound of the number of bits required, so aren’t you throwing the baby out with the bath water to do the compression needed on all of this data? Go any lower and you’ll lose coverage, go any higher and the test data

“Ultimately test is about having that intuitive feel, it’s about the tricks you can play to preserve coverage while minimizing pattern data volume. It’s what all of the latest and greatest technologies in test are all about – capturing all of the data for small delay defects while optimizing the compressions.”


Our wide-ranging conversation almost at an end, I asked Tom to put aside his self-effacing ways and give me a list of what he considered to be his most important contributions to the industry, and perhaps his top picks among the 50+ papers he’s published over the years.

He balked at the idea, but then agreed to send me an email after he’d had some time to think about it. I was delighted at the prospect, and also impressed on him that I hoped to receive in that same email some of his best photos of what he had told me was one of his favorite places – Stonehenge in the south of England. He agreed to the deal and we parted ways.

When I received his email the next day, Tom had followed through on his promise. Hence, you’ve been enjoying Tom’s favorite photos from Stonehenge peppered throughout this article. And, here are Tom’s favorite ‘moments’ from a lifetime of achievement.

Clearly, both with respect to his photography and his contributions to the technology, luck had nothing to do with it. These are the accomplishments of someone who was humble enough to work hard, and inspired enough to foment true innovation and excellence. The EDAA Lifetime Achievement Award could not go to a worthier guy.


Hello Peggy,

It was very interesting talking to you today. I hope this is what you wanted. I have reflected on what I think are the most important things I’ve worked on:

  • The relationship between defect level, yield and test coverage as described in this paper:

  • "Defect Level as a Function of Fault Coverage," (with N. C. Brown), IEEE Trans. Computers, Vol. C-30, No. 12, pp. 987-988, December 1981.

  • How that relationship could be extended to transition or delay testing, which is having a resurgence today:

  • "Statistical Delay Fault Coverage and Defect Level for Delay Faults," (with E. S. Park and M. R. Mercer), Proc. 1988 International Test Conference, Washington, DC, pp. 492-499, September 1988 (Best Paper Award - Honorable Mention).
  • The relationship between synthesis and test:

  • "The Interdependence Between Delay-Optimization of Synthesized Networks and Testing," (with B. Underwood and M. R. Mercer), Proc. 28th ACM/IEEE Design Automation Conference, San Francisco, CA, pp. 87-92, June 1991 (Best Paper Award).

  • Playing a role in getting the industry to change in the direction of Full Scan Designs.
  • Cheers,

    Tom Williams


    Peggy Aycinena is Editor of EDA Confidential and Contributing Editor to EDA Weekly.

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    -- Peggy Aycinena, EDACafe.com Contributing Editor.


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