April 17, 2006
Formal From Spec to Sign Off - Real Intent
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| by Jack Horgan - Contributing Editor
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Real Intent is a provider of static and assertion-based verification solutions. The company uses formal technology to improve functional verification of ASIC, SoC and FPGA Devices. Founded in 1999, Real Intent is a privately-held EDA company headquartered in Sunnyvale, CA. I had an opportunity to talk with Prakash Narain, Founder and CEO, and Rich Faris, Marketing Director.
Would you give me a brief biography?
I got my Ph.D. from the University of Illinois. Subsequently, I joined IBM in the test design automation group. IBM is a great company, a fantastic engineering company. It was a tremendous learning experience. The timing was great because that was a time when IBM was moving all of their CAD tools from the mainframe to the workstation. Everything was being implemented in this vertically integrated CAD methodology. I was very fortunate to be part of that process. I worked with some fantastic people in the process of definition of functionality, architecture, implementation and delivery. It was just a tremendous experience after coming out of the university. Subsequently I wanted to
get on the other side of things, in order to understand where are the tool requirements coming from, and where are the EDA tools adding value. I moved to AMD. Again I was very fortunate there because these were the times when AMD was entering submicron technology. 0.5 micron was a big deal. However, prior to that, the design methodology was very manual because silicon area was so important. We had a project where they were looking to completely redesign their chip implementation methodology and they were looking to create a flow all the way from RTL entry to silicon. This was called the Mercury Design Project. It was a top AMD goal to deliver on that project. I was very fortunate
there to work on such a high visibility project, basically to get out of my niche which was test and see how the rest of the design flow worked. Next I moved to Sun Microsystems. I worked on the UltraSparc II project which was a CPU of the Ultra Sparc family. I left Sun to start Real Intent when the silicon was in the shop. I got to see the design project going all the way from the early design stages through tapeout and also through qualification of silicon in the shop. That was again a tremendous learning experience. This time it was as a user of the tool. These experiences combined with my technical background, my Ph.D. background, gave me some ideas about how verification, which
I had identified as a big problem, could potentially be improved. That was part of starting Real Intent. I have been here ever since.
How many years did you work at each of these firms?
I was at IBM for 2½ years, AMD for a year and Sun for a year and a half; a total of about 5 years.
What was your motivation in founding Real Intent?
We all want to do something special. Here there was a situation where I had a certain technical background and I had identified a certain problem domain, namely the verification space. I thought there is a better way to do verification which I could potentially conceive of. That was an opportunity. Up until that point in time I was an engineer and a manger, now I would try to be an entrepreneur. So the motivation was to go out there and build a new solution, a new methodology and a company that would be different in the end and try to do great things.
How did you fund the initial operation?
At Sun I formed many valuable relationships, including one with Andy Bechtolsheim, Senior VP and Chief Architect at Sun. He is the largest investor in Real Intent. I convinced him of my value proposition, my idea. He chose to fund the company. There are other investors in the company but he is the largest.
Wasn't there was round of investment about this time last year?
It was at the end of 2004 ($6.5 million from existing investors)
Rich Faris, Marketing Director, you joined about this time last year.
What caused you to come on board?
I could tell that this company had a lot of passion about what they were doing. It's a small company, and it's a tightly knit team. Everybody is here in this single facility, running in the same direction. You can feel the energy. For me personally, I am responsible for all of Marketing. So it is a lot more responsibility and I enjoy that.
Would you give me an overview of the company?
Prakash: We are looking to build a company that maximally leverages sequential formal analysis as a technology. That's a technology oriented view. Verification as you know is a very big problem in the process of chip design. We believe that sequential formal analysis provides a very strong technology base to improve the verification efficiency for a number of problems. We are looking to build a solution that significantly improves verification efficiency and that leverages analysis and deploys them at appropriate points in the design methodology. We believe that this focus is going to create a very significant value and to provide a much improved methodology for all of our customers.
Would you provide any quantitative data about Real Intent, revenue, number of customers, ..?
We are a privately held company. So we don't share that data. We can tell you that we are more than 25 employees. We have more than 40 customers, geographically dispersed. We have customers in Europe, Japan, and a lot of customers in the US. We are doing very well financially. We have a very good revenue stream. We are investing in growth. We are expanding our channel, our product portfolio. That's the focus of the company right now.
Who are some of your customers?
Sun Microsystems, ATI, Agilent Technologies, nVidia, and NEC Electronics. All are well known, distributed across the globe, across platforms, and across industries like communications, chip makers, ..
Do you sell your products through direct sales or through distributors?
In the US and Canada we sell them directly. In Japan and Europe we sell them through distributors.
How would describe verification?
In terms of our operations and our classification, we break up verification into three spaces: Functional Verification, Backend Verification and Formal DRC Analysis. There is the functional verification market which is probably the second largest segment after the physical verification tools. This is around a $500 million market opportunity. In this space we offer Implied Intent Verification and Expressed Intent Verification. This is a space where there is an existing solution that includes simulation, emulation and test bench. There is an existing methodology with a lot of infrastructure that has been built on top of that. Our strategy in this space is to build evolutionary solutions
as opposed to revolutionary solutions. We make sure that our solutions work very smoothly with the existing solutions which are mostly based upon dynamic verification or simulation. Improving these design processes is one of the opportunities we are targeting. At the same time, if you look at the back end, this is a space where you have timing exception analysis, formal analysis of timing to guarantee timing closure. Here we offer PureTime. We expect this space, which is verification of timing exception, to grow to be the size of the checking market. Finally there is the formal DRC market which is a product looking to provide value in the design at different points in time. There
are a lot of design rule checks that happen at multiple steps in the design process. Our offering in this space is Clock Intent. Today if you look at any reasonable design, a design can have 5, 10 or 20 clock domains. This is a very recent phenomenon. When you have so many clock domains, you have to employ very strict design rule paradigms. Otherwise you can't expect reliable data transfer across clock domains. We have the best product in the industry in this particular space which is our clock intent verification tool. If you look at the application of this product, we would like to say that we have productized formal
analysis all the way from design entry to silicon.
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-- Jack Horgan, EDACafe.com Contributing Editor.
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