April 03, 2006
Optimization - Athena Design Systems
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

The top articles over the last two weeks as determined by the number of readers were

Synopsys Provides Electronic Design Automation Solution for Sun Microsystems' UltraSPARC T1 Processor Synopsys annoucned Galaxy Design and Discovery Verification Platform support for Sun Microsystems' UltraSPARC T1 processor, for which Sun recently announced the release of hardware design specifications under an open-source GNU GPL license. This same extensive portfolio of EDA tools has been used by the Sun Microsystems engineering team to implement and verify the UltraSPARC T1 processor in silicon. The availability of the UltraSPARC T1 processor design, coupled with Synopsys' extensive
global user community and large university program membership will help enable innovation in the area of chip multi-threading (CMT) processor architecture design.

Anasift Introduces AASPICE, the Accurate SPICE Analog Simulator; New Analog Simulator Meets HSPICE Accuracy AASPICE is targeted for the analog simulation of high-performance analog ICs used in high-speed communications, networking, display, storage, consumer electronics, etc. AASPICE is integrated with Anasift's transistor-level analog optimization tool AMPSO as analog verification engine.

NVIDIA Corporation to Acquire Hybrid Graphics Founded in 1994 and based in Finland, Hybrid Graphics Ltd., is a developer of embedded 2D and 3D graphics software for handheld devices. Hybrid Graphics will become a subsidiary of NVIDIA Corporation and will continue to market and sell its products under the Hybrid name.

Silicon Design Systems Enhances Its Interconnect Synthesis Product; Flagship Product, K-Route, Continues to Show Improved Design Results K-Route has added fine-grained multi-mode/multi-corner analysis capability to support conflicting design constraints and variability. This innovative new advancement enables highly efficient critical-path optimization for all corners and modes, in contrast to the less-refined block-level optimization currently supported by other methodologies. The K-Route next-generation IC router automatically adjusts the netlist incrementally, as well as performs incremental
placement and routing to solve identified violations, while optimizing each net for the worst-case corners and mode.

Mentor Graphics Announces Expanded Availability of VeSys Electrical Series VeSys products complement Mentor Graphics' Capital Harness Systems (CHS) electrical design flow, which is targeted at large, multinational organizations within the automotive, aerospace and rail industries. VeSys products are designed for smaller organizations and can be deployed very rapidly. Typical applications include competition cars, agricultural machinery, recreational vehicles, custom trucks and buses and materials handling equipment.

Other EDA News

Other IP & SoC News

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-- Jack Horgan, EDACafe.com Contributing Editor.


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