March 06, 2006
Yield Analysis Automation - LogicVision
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Intel, Samsung, TI and Other Leading Semiconductor Vendors to Participate in China's Biggest IC Event More than 200 semiconductor companies will showcase their latest technologies at Global Sources' 11th International Integrated Circuit-China Conference & Exhibition (IIC-China) in March. IIC-China is expected to attract over 24,000 technology specialists. IIC-China will be staged in China's key electronics manufacturing hubs-in Shanghai on March 6 - 7; Shenzhen on March 10 - 11; and Beijing on March 13 - 14. It is held in conjunction with Embedded Systems Conference-China.
Sequence Revs Columbus-AMS for Faster, Better Wireless/High-Frequency Designs Sequence Design introduced the next generation of Columbus-AMS which is both a foundation for its RTL-to-silicon power-aware design tools, and its RLC parasitic extraction tool for high-performance, analog/mixed-signal design. New features include high-performance reduction controls and mixed-mode modeling capabilities to save time and simplify wireless and high-frequency design tasks
Poseidon Design Systems Appoints Brian Bailey as Chief Technologist Brian Bailey has served on the Poseidon Technical Advisory Board for the past year providing guidance and technically contributing to the direction of the company. He is the Chairman of the Accellera Interfaces committee. He has written two books and published many papers on the subjects of design and verification. Prior to this appointment Mr. Bailey was an independent industry and management consultant. He had previously been Chief Technologist for functional verification at Mentor Graphics.
on the amount of customization and associated project needs, and include the environment deliverables. An annual support contract is required.
Other EDA News
Teradyne Integrates EDA Conversion Tools with FLEX Platform's IG-XL Software; Provides Free 90-Day Trial License for Test Insight Software Suite
Accellera Invites DATE Attendees to Open Meeting, Open Verification Library Session, & Exhibition Theatre Panel on Electronic System Design Standards
ADVISORY/ Synopsys to Highlight Complete Wireless USB, PCI Express, SATA and Mobile Storage IP Solutions at Intel Developers' Forum 2006
Cadence President and CEO Mike Fister to Present at the Morgan Stanley Semiconductor & Systems Conference
Nangate Delivers All-Inclusive Cell Characterization Solution; Fast Characterization of Cell Libraries Enables Custom Corner Optimizations and Reduced IC Power Consumption
Actis Design Names ISS Group its European Distributor; Will Demonstrate Actis' AccurateC for SystemC Code Analysis During DATE 06
ADVISORY/ VaST Systems Technology's Virtual System Prototypes for Embedded Designs at Intel Developer Forum
VaST Systems Technology Announces Availability of Virtual ARM1136, ARM1156, ARM1176 Processors; Sees High Demand for VaST Models of ARM Processors
SynTest Receives a Fundamental Patent for At-Speed Capture Invention for Logic BIST; "Multiple-Capture DFT System for Detecting or Locating Crossing Clock-Domain Faults During Self-Test or Scan-Test"
Cadence and CEVA Collaborate to Deliver Verification Process Automation to End Customers; CEVA Joins OpenChoice IP Program and Standardizes on Cadence Incisive Enterprise Family
Sequence PowerTheater Meets Sub-90nm Challenges For Mobile, Wireless; Slash Power Budgets With RTL Analysis
ADVISORY/ Sandwork to Demonstrate Silicon Verification and Layout Parasitic Signal Integrity Analysis at DATE; CEO on panel
Celoxica and Philips TASS Team to Accelerate ESL Adoption in Europe; Combines Celoxica ESL Technology With Philips TASS Services and Know-How
Cadence and Moscow Institute of Electronic Technology Conclude Joint Education Project; The Graduate Program Has Become Self-Sustained and Will Continue to Train Russian Engineers in Advanced IC Design
Mentor Graphics Corporation Announces Pricing of Private Placement of 6.25% Convertible Subordinated Debentures Due 2026
Summit Design's Vista(TM) IDE Simplifies Intellectual Property Development and Design Sharing For SystemC-Based Designs Without A Run-Time License
Azuro Expands Executive Team; Appoints Vice Presidents of Product Marketing and Applications Engineering
Synopsys Chief Financial Officer to Speak at the Morgan Stanley Semiconductor and Systems Conference on March 7, 2006
Magma Announces Availability of Integrated Advanced Low-Power Reference Flow for IBM-Chartered 90-Nanometer Common Platform
Cadence Collaborates With IBM and Chartered to Deliver 90-NM Low-Power, Yield-Aware Reference Flow; Offering Enables Customer Success By Accelerating Time to Market for SoC Designs
NEC Adopts Sigrity's Chip-Package Co-Design Solutions for Dynamic Power Analysis; CoDesign Studio and XcitePI Solutions Chosen to Identify Critical Package Effects and Prevent Costly Respins
Other IP & SoC News
Atrenta Showcases Predictive Development Technology at DATE 2006; Next-Generation SpyGlass(TM) on Display at Stand #A14
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