July 29, 2002
EDA Week in Review
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Ann Steffora - Contributing Editor

by Ann Steffora - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Mentor Graphics Corp.'s IKOS Systems subsidiary has filed a patent infringement lawsuit in Delaware US District Court against Cadence Design Systems, Inc. and its Quickturn subsidiary. The filing states that Palladium, a Cadence/Quickturn hardware emulation system, infringes on United States Patent No. 5,847,578, “Programmable Multiplexing Input/Output Port,” that was awarded to IKOS Systems in 1998 on the basis of original work done in the company's Waltham, Massachusetts facilities, Mentor said. Mentor Graphics acquired IKOS in March 2002 after a bidding war with Synopsys, Inc.
Cadence promptly replied stating that it would “vigorously dispute” the complaint. Stay tuned here for developments in the saga. For years, Mentor and Quickturn have done battle in the legal arena over emulation patents.
Speaking of sagas, HPL Technologies, Inc. received a NASDAQ Staff Determination delisting notification since it does not comply with the NASDAQ listing standards. The letter informed HPL that its securities were subject to delisting from the NASDAQ National Market due to violations of NASDAQ Marketplace Rules 4310(c) (failure to timely file reports) and 4330(a) (public interest concerns). HPL has requested a hearing before a NASDAQ Listing Qualifications Panel to review the delisting.
Further, David Lepejian, HPL former chairman and chief executive is being forced to sell some of his stake in the company once the stock starts trading again to repay a brokerage loan, reports said.
UBS PaineWebber filed documents Monday on behalf of Lepejian, registering to sell about 1.5 million of his HPL shares as soon as possible. The proceeds of these sales would be used to repay an undisclosed amount of money that Lepejian has allegedly borrowed from UBS PaineWebber.
Lepejian founded HPL in 1989 and owned 10.25 million shares and options to buy an additional 3.2 million shares as of May 31. He had largely held onto his stake, which represents 40 percent of the company, since HPL went public a year ago.
Weinstein Kitchenoff Scarlato & Goldman Ltd., the Law Offices of Leo W. Desmond, and Wechsler Harwood Halebian & Feffer LLP all filed new class action lawsuits against HPL and its officers for securities fraud.
Innologic Systems, Inc. announced two new appointments to the company's board of directors including John Sanguinetti, who joined as a new member of the board of directors and Andrew Yang, who was appointed as the new chairman of the board.
Yang received his Ph.D. from the University of Illinois, Urbana-Champaign, 1989. He was a tenured professor at the University of Washington from 1989 to 1996. Yang founded Anagram, Inc. in 1993, providing high-capacity simulation solutions for deep-submicron ICs. After overseeing the merger of Anagram with Avant! in 1996, Yang was the Vice President of Avant!'s Analysis Product Division and was responsible for the extraction and analysis products. From 1998 to 2001, he was a private-venture investor and served as a board member and advisor for a number of EDA companies including: Sapphire, Innologic, CADMOS, and Ultima. In March 2001, Yang co-founded Apache
Design Solutions a company that focuses on pre-layout physical design integrity. He currently serves as CEO and Chairman of Apache Design Solutions.
Sanguinetti has been active in computer architecture, performance analysis, and design verification for 20 years. After working for DEC, Amdahl, ELXSI, Ardent, and NeXT computer manufacturers, he founded Chronologic Simulation in 1991 and served as company President until 1995. He was the principal architect of VCS, the Verilog Compiled Simulator, and was a major contributor to the resurgence in the use of Verilog in the design community, serving on the Board of Directors of Open Verilog International (OVI) and Accellera. He was also a major contributor to the working group that drafted the specification for the IEEE 1364 Verilog standard. In 1998, Sanguinetti
was a co-founder of CynApps, which is now Forte Design Systems. He received a Ph.D. in Computer and Communication Sciences from the University of Michigan in 1977.
Cadence Design Systems, Inc. appointed Guillaume d'Eyssautier to Vice President and General Manager for its European operations. d'Eyssautier was formerly Vice President for Europe, the Middle East and Africa at IBM Technology Group, which develops, manufactures and markets microelectronics and hard disk technologies.
Cadence said d'Eyssautier would focus on building deeper relationships with customers in Europe while broadening the appeal of the company's nanometer-design products and services to electronics businesses of all sizes. He has held both senior executive and technical positions during his 20-plus-year career in key roles at leading companies prior to his tenure at IBM, including Rockwell Semiconductor Systems, GEC Plessey, Matra Harris Semi-Conductors and Philips Semiconductors.
d'Eyssautier has a Masters Degree in Electronics and Computer Science from ISEP Engineering School in Paris, France and an MBA from INSEAD, in Fontainebleau, France, where he majored in Industrial Marketing and Corporate Finance.
Numerical Technologies, Inc. announced that Larry Hollatz has joined the company as its president and chief executive officer, as Numerical's founding CEO, Dr. Y.C. (Buno) Pati, steps up to serve as chairman of the board, taking over for Bill Davidow. Davidow will assume the role of vice chairman and will continue to serve as a board member.
The company said Hollatz will spearhead the day-to-day operations of Numerical -- guiding it toward continued growth and increased profitability, and helping the company capitalize on its pioneering role in deep subwavelength lithography. He will also focus on building the business and operational infrastructure needed to drive the company forward.
Before joining Numerical, Hollatz held various senior executive roles at AMD. Most recently, he served as group vice president for AMD's Computational Products Division, where he had overall corporate responsibility for the design, development, manufacturing and delivery of AMD's Athlon microprocessor. Prior to this position, Hollatz served as vice president and general manager of AMD's Texas Microprocessor Division. Previously, he served as vice president of AMD's Embedded Processor Division.
Before AMD, Hollatz served in a variety of management positions at NCR Corp., including general manager of two microelectronics divisions, director of manufacturing and manager of advanced process development. He also served in the U.S. Air Force for a number of years in a variety of senior process development and microelectronics management positions. Hollatz holds an MSEE and a BSEE with high honors from the University of Illinois.
Cadence also reported that Toumaz Technology Limited, spun out from Imperial College, London, UK, that is developing ultra low power Advanced Mixed Signal systems (AMx), has standardized its design flow on Cadence tools and methodology services.
Toumaz said it is using a front-to-back analog design flow based on Cadence tools including custom Virtuoso IC layout tools, Spectre Circuit and RF Simulation, Cadence Analog Design Environment, Diva physical verification and will utilize Cadence methodology services for digital synthesis and layout.
Toumaz said it selected Cadence as its EDA partner after valuing the contribution of Cadence in assisting research staff at Imperial College during the development of critical devices and techniques for ultra-low power processing applications.
Mentor Graphics Embedded Systems Division and First Silicon Solutions (FS2) reported that Silverback Systems is using its set of development tools designed for development of the company's recently introduced iSNAP (Storage Network Access Processor).
Accelerated Technology, the Embedded Systems Division of Mentor Graphics announced immediate release of Nucleus PLUS MTD for the ARM RealView Debugger.
Nucleus PLUS MTD for the ARM RealView Debugger is aimed at reducing system complexity by allowing developers to debug and tune their applications at the task level. When plugged into the ARM RealView Debugger, the Nucleus PLUS MTD extends the RealView technology to provide kernel aware debugging for Nucleus PLUS, a flexible and portable real-time kernel. Among other things, the ability to debug at the task level allows developers to monitor Nucleus PLUS resources, set task dependant break points and view the call tree for each individual task.
Synopsys, Inc. introduced a new release of its physical synthesis tool, Physical Compiler 2002.05. The company reports that this release runs twice as fast as the previous release and improves quality of results by an average of six percent by making improvements to the core algorithms in the tool. This release of Physical Compiler also comes with a new and improved graphical user interface that offers faster run times for basic operations such as design loading, congestion display, airline display and schematic display, Synopsys said.

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-- Ann Steffora, EDACafe.com Contributing Editor.

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