September 06, 2002
EDA Week In Review
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Former HPL CEO Charged with Felony for Wire Fraud
more than $28 million in nonexistent sales that resulted in the company overstating its revenue for fiscal 2002 by 328 percent.
Synopsys, Inc. completed its acquisition of Co-Design Automation, Inc. and plans to, “further advance the development of a complete design and verification flow for SystemVerilog, the next-generation Verilog language,” said Manoj Gandhi, senior VP and GM of Synopsys' verification technology group in a public statement.
Cadence Design Systems, Inc. and Synchronicity Inc. inked a multi-million-dollar, three-year agreement that renews and extends their 1999 OEM agreement for design management software and maintenance. Under this new agreement, Synchronicity will provide development support, enhancements and maintenance for VersionSync, a basic version control solution for small, single-site, LAN-based IC development teams using the Cadence CIC tools. VersionSync will be upgraded to support Linux and 64-bit variants of Solaris and HP/UX. Cadence said it would make VersionSync available to all CIC users and be responsible for first level support.
Monterey Design Systems is expanding its sales and technical support organization with new offices in Italy, Boston, and Dallas, as well as additions to the West Coast sales staff. The addition of the new offices has created immediate openings for qualified applications engineers in Boston, Grenoble, Milan and Israel.
inSilicon Corporation is now shipping its USB On-The-Go (OTG) Controller Subsystem for consumer electronics and PC peripherals. The USB On-The-Go Specification is a supplement to the USB 2.0 Specification and adds Dual Role Device capability to USB devices. This allows a USB peripheral (device) to act as a mini-host, directly connecting to and driving a second USB device. For example, a USB device such as a digital camera implementing OTG can connect directly to an Xscale processor-based PDA and instantly transfer photos for viewing.
Esterel Technologies has partnered with France Telecom R&D and has integrated the France Telecom R&D Fast-C (SAXO-RT) compiler into its Esterel Studio product. The integrated Esterel Studio/SAXO-RT solution is meant to provide developers of embedded telecom applications with seamless development flow from specification to embedded C code.
errors affect their circuits and then incorporate a solution before the product is released for manufacturing. Semiconductor manufacturers, system houses, fabless companies and IP providers are able to qualify their products with respect to an acceptable SER.
Elite testbench automation tool.
Verisity and Be One Lab Inc. are shipping three new e Verification Components from Be One Lab. SONET/SDH, SPI4, and UTOPIA4 are Be One Lab's initial offerings of reusable, plug-and-play verification components for standard interfaces based on Verisity's high-level verification language, e. These eVCs, which were developed using Specman Elite, will be eRM compliant by Q402, meeting the standard requirements for full interoperability with all other eVCs developed using Verisity's e Reuse Methodology.
Verisity and Cold Spring Engineering announced the availability of a new e Verification Component from Cold Spring Engineering. The SPI 4.2 eVC is the newest addition to a growing list of configurable, reusable, plug-and-play verification components for standard interfaces based on Verisity's high-level verification language, e. This eVC, developed using Specman Elite allegedly reduces the time necessary to create the verification infrastructure and automated testbench environment.
Verisity and HCL Technologies announced the availability of an e Verification Component for the ARM7 ISA standard. eVCs are reusable plug-and-play verification components for standard interfaces based on Verisity's high-level verification language, e. HCL Technologies' new ARM eVC contains verification capabilities for the ARM v4T ISA, meant to cut verification environment development time.
Amphion Semiconductor, Inc. has developed ASIC- and FPGA-targeted versions of its hardware-accelerator cores for MPEG-4, MPEG-2, and JPEG2000 compression with AHB interfaces compatible with the AMBA specification for on-chip system bus connectivity. The provision of Advanced High-Performance Bus (AHB) interfaces is aimed at enhancing the applicability of Amphion's silicon-efficient core solutions to AMBA-based SoC designs, such as those leveraging RISC microprocessor cores from ARM and other processor IP providers.
Celoxica Ltd., Motorola and StrongBow Technologies are working together to create servers that embed applications, such as transaction processing for credit cards, directly in hardware. StrongBow's modular server technology is designed around Motorola Computer Group's MXP platform and the proposed PICMG 2.20 standard for a high-speed serial mesh interconnect. The platform carries boards with multiple Xilinx Virtextm-II Pro Platform FPGAs, for massively parallel hardware implementation of applications, which are programmed using Celoxica's DK1 design suite. Customers can quickly and confidently design, implement and manage business critical applications.
Synopsys, Inc. announced that the Avant! tool Hercules now provides design rule check (DRC) rule files for TSMC's Nexsys 90 nanometer process technology. Through a collaborative effort with Synopsys' physical verification specialists, TSMC design services engineers have developed Hercules rule files for DRC and layout versus schematic (LVS) checking. These rule files are meant to enable designers to verify their designs quickly and easily for TSMC's most advanced process technology, the companies reported.
LogicVision, Inc. announced VIA Technologies Inc. of Taipei, Taiwan has adopted LogicVision's Embedded Test technology for its next chip designs. LogicVision said it is pleased to add VIA Technologies to its list of new customers and look forward to working with VIA Technologies to enhance their device development with its Embedded Test technology.
Actel Corporation launched a website dedicated to the growing problem of design theft and lack of awareness in the industry. The Actel Security Resource Center (
www.actel.com/products/security/) provides customers, design engineers and managers with information on the fundamentals of security issues and secure FPGA solutions, including technology tutorials, market overviews, white papers, government links and extensive glossaries. Actel believes the website will enable the design community to increase its awareness of critical design principles, methodologies and common security threats, such as overbuilding, reverse engineering, cloning and denial of service.
Silicon Metrics Corporation announced an agreement with Tritech Systems Inc. for exclusive rights to represent Silicon Metrics for the marketing, sale and support of the entire SiliconSmart product line in Korea.
Cohesion Systems, Inc. announced one-year term subscription licensing for their Chip Designer and System Designer product lines. Cohesion Chip Designer provides a design and debug workflow for Custom IC, Analog and Mixed Signal in multi-user design environments, supporting industry standard simulation, synthesis and layout flows. System Designer is for the design of complex boards and multi-module systems, optimized to drive the Allegro design flow.
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