October 14, 2002
Apache Unveils Next-Generation Power Integrity SOC Tool
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Ann Steffora - Contributing Editor


by Ann Steffora - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

The mission of the reconfigurable systems IIAP is to build design technology that enables the programming of heterogeneous reconfigurable platforms with the same ease of use as current technology allows for general-purpose processors. Key activities include the development of an operating system that enables true hardware/software multitasking and the integration of interconnect networks on silicon for task-level reconfiguration in reconfigurable hardware.

Within this program, IMEC and Xilinx Research Labs will collaborate in developing a programming environment for reconfigurable systems based on the VIRTEX-II Pro devices as well as future devices. This programming infrastructure will provide support for seamless hardware/software multitasking in future reconfigurable computing platforms. The partial and dynamic reconfiguration capabilities of Xilinx FPGAs will be exploited in full to achieve that goal.

Corporate News

Monterey Design Systems has been issued patents numbered US 6,442,743, US 6,446,239, US 6,449,756 and US 6,449,761 by the United States Patent and Trademark Office bringing the company's patent total to eleven. The patents apply to the physical IC design technology that drives Monterey IC Wizard hierarchical design planning, Sonar physical synthesis and prototyping, and Dolphin physical implementation products.

Two of the new patents are key to Monterey's Progressive Multi-objective Refinement (PMR) technology. This approach to physical implementation provides for simultaneously optimizing the design for multiple criteria and progressive refining the chip implementation until all requirements are met. Monterey does not separate physical implementation into discrete, sequential steps performed by multiple, disparate point tools, as do all other vendors. Rather, all construction and analysis operations are performed simultaneously.

Two further patents were awarded for Monterey's hierarchical design planning technology. IC Wizard provides automated design planning capabilities that can improve die size and turnaround time on multi-million gate hierarchical SOC designs.

Ansoft Corporation has been ranked as one of 50 fastest growing technology companies in Southwestern Pennsylvania by Pittsburgh Technology Council awarded at the group's sixth-annual Tech 50 award ceremony at Carnegie Music Hall in Pittsburgh, Penn. The Pittsburgh Technology Council gives the Tech 50 award to high-tech companies in Southwestern Pennsylvania that demonstrate financial growth, advancement in product development or sales, corporate citizenship, job growth/retention, and innovation.

Magma Design Automation Inc. established sales and support offices in Korea to support its major customers in the Korean market. Magma's Korea office will be in Seoul and will be headed by Y.G. Jung, recently named regional sales director of Magma's Korea operations. Prior to joining Magma, Jung was the sales manager of Synopsys Korea where he was responsible for many major accounts. He previously held sales positions with Antrim, Texas Instruments, Mentor Graphics and LG in Korea.

In additional news from IMEC, the European microelectronics R&D center said it is setting up a 300mm silicon research platform initiative to perform advanced process research at least two generations ahead of manufacturing. The initiative will serve several development organizations worldwide. A first important step has been achieved with the decision of the local government to grant funding of 37.18 million for the construction of the clean room.

To address the huge challenges resulting from the changing research environment, IMEC plans to set up a centralized 300mm silicon research platform. The initiative is based on IMEC's expertise and track record and will serve several development organizations worldwide. The goal of the research platform is to demonstrate novel device architectures and to perform research on process steps and modules. The advanced process research will run 2 to 3 technology nodes ahead of manufacturing.

The research fab will be very flexible and will operate at ultra-short cycle time. It will be built around the world's most advanced lithography clusters such as 157nm and EUV. To share common facilities, infrastructure and metrology tools and to use available human resources, the new fab will be located adjacent to current IMEC facilities.

Within this research platform, IMEC will continue its current business model, based on a sharing of cost, risk, talent and IP. Strategic long-term partnerships with a core set of equipment suppliers and major IC manufacturers will be set up to carry the investments. A first important step has been achieved with the investment of 37.18 million by the local government.

This new lab will also free up space in the current 200mm clean room to perform research in a broad range of nano-technology domains. This nano-research is important in preparation of the post-silicon era and will have numerous different applications in new industries and spin-offs.

Numerical Technologies, Inc. reported that one of its directors, Roger Sturgeon, has been honored with an award by industry association, Semiconductor Equipment and Materials International (SEMI). Presented at the annual SEMI dinner in San Jose, Calif., the award acknowledges Sturgeon's outstanding contribution to the advancement of semiconductor manufacturing technology.

A Numerical director since January 2000, Sturgeon has spent his career engaged in the ongoing development of cutting-edge solutions to suitably handle and transform design information into manufacturable ICs. More than three decades ago, he led the original GDSII team -- a cadre of technologists that produced the definitive IC design information format that enabled the efficient representation of design data, allowing it to be viewed, manipulated and shared between tools. It is his work with this industry-standard technology that earned him last night's SEMI award.

In 1986, Sturgeon co-founded Transcription Enterprises Limited-a leading developer of mask data preparation (MDP) software -- which was acquired by Numerical just before the company went public in early 2000. Under his stewardship, the company's signature CATS software became a fixture in virtually every IC company throughout the world -- exerting a market dominance that continues today. Since joining Numerical's board, he has brought leadership and vision to the company's CATS division while becoming a key moderator in the industry-wide debate on the challenges of handling subwavelength design data.

Events

The 40th Design Automation Conference (DAC) has issued a call for papers for regular technical papers, special topic sessions, panels, tutorials and university design contest entries. The annual conference, which promotes advances in design automation software and hardware for electronic systems, will be held June 2 to 6, 2003 at the Anaheim Convention Center in Anaheim, Calif. Authors are invited to submit original technical papers describing recent and novel research or engineering developments in all areas of design automation for the Design Methods or Design Tools Tracks, or for Embedded Systems Topics. The paper submissions deadline is Friday, December 6. The submission site is
scheduled to open Monday, October 21. Panel and special session proposals will be accepted through Monday, November 4, 2002. That submission site is scheduled to open Friday, October 4.

The Student Design Contest is an invitation to students to submit descriptions of original electronic designs, either circuit level or system level. Two categories of designs are eligible for awards -- operational and conceptual. For operational designs, proof-of-implementation is required. A complete simulation is necessary for conceptual designs. Designs must be part of the student's university studies and must have been completed after June 2001. Selected designs will be presented at the conference. Student Design Contest submissions must be submitted by Friday, December 20, 2002.

Notification of acceptance for all will be made by Friday, February 28, 2003. For more information, call (303) 530-4333, or visit the DAC website for more specifics on submission requirements. The site is located at: http://www.dac.com.

Electronic system-level (ESL) design solution and methodology provider Summit Design, Inc. will present a seminar on ESL Design on October 24 at the Westin Hotel in Santa Clara, California. The company said that the half-day seminar, beginning at 8:30 A.M., would demonstrate and discuss new tools and methodologies to design and manage complex semiconductor design, accelerate RTL flow through fast verification and leverage existing investment in C/C++ and SystemC technology.

The Annual EDA Consortium Phil Kaufman Award Dinner will be held Tuesday, November 12, 2002 at the San Jose Fairmont Hotel, 6:00 PM in the Club Regent Room.

Ansoft will be conducting seminars in Phoenix, LA, Irvine, San Jose, Portland, Ottawa, Boston, Philadelphia, Wash. DC, Dallas and Denver during the month of October. The seminar is entitled, “Empowering Profitability—a workshop for Signal Integrity, Radio Frequency, Microwave, and Optical designers.” Engineers attending will be taught techniques to simulate: 10 Gigabit, XFP Optical Modules, Low-Noise Amplifiers and Elliptic Filters, Power Integrity for High-Speed PCBs, Advance VCOs, Sub-Harmonic Mixers, LTCC Modules for Communication Systems, Full-Wave Package Analysis, Frequency-Selective Surfaces and High-Density RFIC Interconnect. For more information, visit,


You can find the full EDACafe event calendar here.


To read more news, click here.



-- Ann Steffora, EDACafe.com Contributing Editor.


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