December 23, 2002
EDA Unplugged
Please note that contributed articles, blog entries, and comments posted on are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Additionally, Cadence Design Systems, Inc. announced that it has delivered source code for the OpenAccess reference database implementation to the OpenAccess Coalition. The delivery of the code will allow electronics companies to more quickly and easily create integrated design flows of tools from multiple vendors and internal technology. Si2's Schulz said, “The OpenAccess Coalition expects to make the database source code freely available to design engineers worldwide in our open-community source program via in early January 2003.”

ParthusCeva, Inc. and ARM Ltd. announced a new development environment for their mutual customers, which enables ASIC designers to combine ParthusCeva's DSP cores and ARM CPU cores in multiple-core silicon products. The partnership addresses development complexity, verification time, and the cost of SoC designs, while allowing hybrid RISC/DSP designs to be emulated, debugged, and optimized through a common development environment. The development environment includes a suite of tools using key components from the ARM RealView development environment and ParthusCeva's Integrator platform-compatible Core Module Board and software support tools, allowing for concurrent software

Synopsys, Inc. announced that Agere Systems Inc. has taped out Agere's newest SONET/SDH framer SoC using Synopsys' Astro physical implementation solution. The Agere MARS Universal framer IC is an integrated, full-featured framer for multi-service metro and access networks, scalable from rates of 155 Mbps to 10 Gbps. The chip is comprised of 11 million gates, multiple high-speed interfaces, and several hundred clock domains with a system clock speed of 155 MHz. The design was implemented in Agere's 140-nanometer silicon process. Astro played an important role in the completion of the chip by providing routing and advanced physical optimizations. In addition, Astro is part of
Agere's standard ASIC SoC design flow.

Also from Synopsys - The company has introduced Telecom Workbench to address functional and conformance verification of multi-standard SoCs. Telecom Workbench combines support for multiple broadband protocols such as Internet Protocol (IP) and Asynchronous Transfer Mode (ATM), with support for next generation SONET/SDH standards by adding features for virtual concatenation, LCAS, and GFP. By integrating conformance testing within the functional verification environment early in the design cycle, Telecom Workbench provides diagnostic capabilities for validating standards interoperability that are traditionally available in the lab only after silicon has been produced. Acterna
Corp. has adopted Synopsys' Telecom Workbench as part of its verification environment.

Coming soon to a theater near you

VirtualDACafe 2003 - This on-line EDA tradeshow, hosted by IBSystems, will be a live interactive event February 11th to the 13th ( available on-demand through April 15th). Ron Roher, EDAC's 2002 Phil Kaufman Award winner, will be delivering the keynote address. Roher, now Chief Engineer at Magma, says, “Hosting a tradeshow on the desktop is an idea whose time has arrived. For the EDA engineer or manager this is a great way to learn about new technology without the concern of physical travel. As EDA technology becomes increasingly sophisticated, I am sure the industry will embrace the idea of desktop tradeshows, conferences, and workshops as an excellent way of keeping
their employees up to speed with technology advances while reducing travel costs and inconveniences.” (

DAC 2003 - With the money you've saved by attending virtual tradeshows, you can then make it to Anaheim for the Design Automation Conference. The Happiest Place on Earth will be hosting DAC 2003 from June 2nd to the 6th. You'll be able to divide your time between the Anaheim Convention Center and the granddaddy of all amusement parks just down the street, Disneyland. (Check out the new California Grand Hotel done up in Craftsman style, a la Yosemite's Ahwanhee Lodge - very cool in a Magic Kingdom kind of way.)

Last year's DAC in New Orleans suffered a somewhat reduced attendance for a variety of reasons - the economy, the economy, and the economy. Now pent-up demand for the conference and all its carryings-on, promises a large and animated attendance in 2003. Conference organizers will be offering more than 50 Technical Sessions, the labyrinthine Demo Suites, and a wild and endlessly entertaining Exhibition Hall. Currently, over 200 companies in EDA, IP, and silicon design are planning to be there. You should plan to be there as well. (


James Lee, announced the formation of The ASIC Group, which will offer electronic design and verification services for ASIC, ASSP, and SOC designs, tool evaluation, design methodology services, FPGA proyotyping, and training. Members of the company have 15-plus years' experience in the design and verification of low-power designs, and high-speed, high-power designs such as graphics chips, bus bridges, disk controllers and networking circuits, and have served numerous clients including IBM, LSI Logic, Qualcom, and Seagate. Lee is author of Verilog Quickstart, a guide to Verilog design. He will serve as President of the company.

Barcelona Design Inc. announced the appointment of Khanh Le as Executive Vice President of Engineering. Le has more than 18 years in the semiconductor industry and will be responsible for leading engineering, product development, and operations. Le joined Barcelona from LSI Logic, where he was Vice President of High-speed Interface Engineering, and managed product development and strategy for the 1.0-4.25 Gbps Gigablaze technology, memory, and other high-speed interfaces. Previously, Le served at Sun Microsystems as a chief designer for the UltraSparc III microprocessor, in charge of processor circuit and physical design.

Tera Systems, Inc. announced Michael Purnell has been named Vice President of Research and Development. Purnell joins the company after more than two decades of engineering and business management experience in EDA. Prior to coming to Tera Systems, he was President and Co-founder of Stage2 Innovations. He has also served as Vice President of Engineering for Precedence Inc. and held various engineering management positions with Mentor Graphics, Silicon Design Labs, and Bell Laboratories.

0-In Design Automation, Inc. announced that Rick Hyman joined the company as Vice President of Worldwide Sales. Hyman has more than twenty years' experience in engineering and sales management and was, most recently, President and CEO of TeraOptics Networks, an optical switching and routing company. Previously, he held sales management positions at Silicon Spice, MMC Networks, NVIDIA, and was at Synopsys in sales and marketing management. Admirably, Hyman and his wife, Cheryl, host a charity dinner every year benefiting the Lance Armstrong Foundation.

Also from 0-In Design - TJ Boer has joined the company as Vice President of North American Sales. Boer has more than fifteen years' experience in engineering, sales, and marketing management, most recently as Senior Vice President of Sales at Sequence Design, where he managed U.S. and Japan sales and operations. Previously, Boer was at Synopsys, where among other roles, he served as Director of Synthesis Marketing.

In the category of ...

Into every life a little rain must fall

Hollywood-like imagery notwithstanding, the world of high tech is not all it's cracked up to be. In fact, behind relentless efforts to push the envelop and the sleek facade of technological innovation, there are real people milling around the break room, sending e-mails to complain about the boss or paltry year-end bonuses, or sending flowers to their significant other because they didn't make it home (again) for dinner last night and left too early this morning to say hello. For the last several years, the world of high-tech has also been haunted by a visible population of laid-off-niks - your friends and co-workers who used to mill around the break room with you, but now just hang out at
Starbucks reading the want ads.

It's the Holiday Season. For whatever it's worth, why don't you pick up the phone or shoot off an e-mail to that friend down at Starbucks. He or she is probably feeling pretty blue - it's been over two years since the bubble turned to bust and those want ads aren't looking any friendlier. The coffee isn't getting any cheaper either. It will only take you a couple of minutes and will definitely lift the spirits of the person at the other end. Besides, when they're employed once again and you send an e-mail saying, “It's great to see you're back!” ... it'll be clear that you're more than just a fair weather friend.

Then lean back, watch the snow fall, and listen to the sax -

Here we are as in olden days,

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You can find the full EDACafe event calendar here.

To read more news, click here.

-- Peggy Aycinena, Contributing Editor.

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