August 04, 2003
A Delicate Balance
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!


Synopsys, Inc. announced that Renesas Technology Corp., a joint venture between Hitachi, Ltd. and Mitsubishi Electric Corp., standardized on Synopsys' Astro physical implementation solution to tape out multiple chips for audio-visual, mobile phone, and office automation products. The chips contained upwards of 5-million gates with a system clock speed of 400 MHz and were implemented in Renesas' 150-nanometer silicon process. The companies report that Astro permitted Renesas to achieve an average of 30% reduction in turnaround time and has become part of Renesas' standard ASIC SoC design flow.


Verplex has announced the release of Conformal 4.0 that “enables SoC designers and verification engineers to deliver functional bug-free silicon.” Conformal 4.0 includes enhancements to Conformal Logic Equivalence Checker (LEC) and integrates new Conformal family products. Cadence Design Systems has recently announced this it will be acquiring Verplex.




Newsmakers


Atrenta Inc. announced the appointment of Jonathan Spira as CFO. Spira brings 20 years of corporate finance experience in the consumer, entertainment, and technology markets to his new role at Atrenta. Ajoy Bose, Atrenta Chairman, President and CEO, said, “He is a top-notch executive who brings to us the financial know-how and corporate experience to grow the company through its pre-IPO stage and beyond.” Prior to Atrenta, Spira served as CFO of ePeople and Autonomy, was director of business planning and finance for the Disney Interactive division of the Walt Disney Co., director of strategic planning and finance for California Pizza Kitchen, a senior financial analyst
for Nestle
Food Co., and a consultant in KPMG Peat Marwick's Merger & Acquisition group. He has an MBA from Cornell University and a BA in Economics from Kenyon College.


Intellitech Corp. announced that the U.S. Patent and Trademark office has awarded the company a patent for its 1149.1-based test and configuration technology. The company says the patent is a broad patent in the area of efficiently accessing circuits for test and configuration. The patent is U.S. Patent number 6,594,802 entitled “Method and Apparatus for optimized access to circuits for debug, programming and test.” Asian and European patents are still pending.


LogicVision, Inc. announced the appointment of Ronald Mabry as Vice President for Marketing and Business Development. He will report to LogicVision President and CEO Vinod Agarwal. The company say, “Mabry comes to LogicVision with nearly 25 years of senior-level management experience in marketing, sales and business development in the
United States and in the Asia Pacific region. He most recently served as vice president, sales and marketing for PACT XPP Technologies, a leader in reconfigurable processing technology. Mabry previously worked for eChips, Bell Microproducts, Western Micro Technology, Avnet, Inc., and Cronin Electronics.”


Mentor Graphics Corp. announced that Plextek has joined its FPGA Advantage Solutions Thrust (FAST) Partner Program. The companies says that, as a result of joining the program, Plextek will receive access to the Mentor Graphics' FPGA Advantage tool suite, and that Plextek will have access to FPGA design methodologies, training, and certifications from Mentor Consulting, the professional services division of Mentor Graphics.


Also from Mentor Graphics - The company says it has selected Memec Design to distribute a selection of its Inventra IP portfolio for use in “FPGA silicon.” Memec Design, which is the engineering division of the Memec Group, will provide customization and integration services for Inventra IP. Mentor Graphics says it selected Memec Design due to “its reputation and expertise as a leading distributor of FPGA technologies, its infrastructure to support the IP needs of FPGA designers, and its global presence.”


Monterey Design Systems says that it has received $10 million in new equity funding. The company says the proceeds will be used to finance the company's growth in supplying the rapidly expanding market for silicon virtual prototyping tools.


Pulsic Ltd. announced the appointment of Ken Roberts as CEO. The company announced that now, Founder and Acting CEO Mark Williams will move into the role of COO. Roberts has extensive experience in EDA having worked most recently at Magma Design Automation, Inc. where he was Vice President and General Manager Europe. Prior to Magma, Roberts was with Quickturn Design Systems, worked at Cadence Design Systems, Daisy Systems, and Marconi Space and Defense. He has an M.Sc in Microelectronics from Southampton & Brunel Universities, a diploma in Microprocessor Design from Bristol University, and a B.Sc in Physics from Manchester University.




In the category of...


Letter to the Editor - Objecting to objects


I read your recent column about your conversation with Mark Jones with great interest.


While Mr. Jones' intentions are well founded and appropriate - after all, who doesn't want an integrated paradigm for the whole design chain that increases our level of abstraction of the problem - unfortunately, his solution is naive. His touting the success of object-oriented design in the software industry shows that Mr. Jones misunderstands both the problem and what the solution should look like.


From the perspective of many experienced engineers, the Microsoft Foundation Libraries, built on object-oriented technology, is one of the most spectacular engineering failures of the technology era. This abysmal piece of engineering does not detract from Microsoft's unrivalled genius in marketing and the amazing commercial success they have earned as a result. However, the success of their products is in spite of the poor engineering underlying the products, not because of it.


The object-oriented approach is indeed incredibly wasteful of processor and memory resources, to an extent that really should have stopped its widespread use. The result is that today's desktop computers - with more than three orders of magnitude better processing power than their predecessors - are no faster at running normal applications than their predecessors, despite their incredible advantage in hardware speed.


Where did all the extra hardware horsepower go? [It went] to accomplishing the total abstraction of the software design problem from the hardware it was to run on. I can understand why this approach would be extremely appealing to a physicist or a mathematician, both of whom value the simplicity of an abstraction above all else. And while I also subscribe to the ideas encompassed in Occam's Razor - in contrast to mathematics, product cost must be a factor in engineering and in this case, the cost is out of scale to the resulting gains.


An old and simple example is the use of Assembly Language versus higher-level languages for coding. It may surprise many younger engineers that at one time, this was a hotly debated topic. Higher-level language compilers, regardless of the language and technology, trade an increased ability to abstract a problem for loss of efficiency in the executable code and growth of the executable code image.


Initially, the penalty imposed was approximately three-fold, although now it is reduced to only about 25%. Though people argued about whether the earlier three-fold loss of efficiency was worth it - and many religious arguments ensued with zealots on both sides - most sober, forward-looking engineers realized that the cost was indeed well worth it and the penalty would decrease with improved compiler technologies.


However, the loss of several orders of magnitude of performance for the benefits of object-oriented design is, in my opinion and that of many other engineers, actually not worth the cost. Unlike my example of higher-level language compilers, there is little hope that improved technology can make a significant dent in the resource demands of this technology. There were, and still are, other methods for achieving higher levels of abstraction that do not require hobbling the system to the degree that this technology does.


The reason object-oriented programming has enjoyed so much commercial success is precisely because it was driven by academia at a time when, in a cost-saving measure, Microsoft and other large software companies made the conscious decision to hire droves of new graduates and put them in design leadership roles. While the young engineers' intentions were in the right places and they were eager to implement the new technology touted by their professors, their zeal and enthusiasm were not tempered by experience. The unfortunate results are plain to see.


The gargantuan code base resulting from their enormous energy is essentially un-testable and un-verifiable, while at the same time riddled with bugs. Many experienced software engineers are of the opinion that this code can never be debugged, nor the resulting operating system reasonably well secured.


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-- Peggy Aycinena, EDACafe.com Contributing Editor.




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