September 08, 2003
Musings at MIT
Please note that contributed articles, blog entries, and comments posted on are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

“I think the biggest challenge for customers in the industry currently is the modeling issue. In order to leverage whatever SystemC provides, we really need to provide complete platforms. And in order to provide platforms, we need the modeling to support it. It's going to be the biggest challenge to the industry and not something that just one company can provide. The solution is going to have to come from different levels and different companies and it's going to require an investment.”

“Similarly, on the architectural side of things - the side that's getting a lot of attention these days - engineers need to be able to estimate the performance metrics for their environment. Multiple systems environments will need architectural exploration and modeling - both are important issues and not something that every engineer is using. But they will definitely be something that will become more useful [as we move forward].”

Coming soon to a theater near you

Denali MemCon - The company describes this two-day conference as “the industry's premier event for leading-edge trends in the business and technology of semiconductor memory.” If they're right, you should go. It's in San Jose at the Westin Hotel on October 7th and 8th, and includes over 25 presentations from industry experts, including representatives from the various sponsoring vendors. Tom Reeves from IBM Microelectronics' ASIC Product Group and Bill Jennings from Cisco Systems' Routing Technology Group will be giving keynotes. Note that if you're going to be in Tokyo on September 11th and 12th, the conference will be happening there before the San Jose event in
October. (

Chartered Technology Forum - Save September 18th and try to get to the Double Tree Inn in San Jose, CA, for this all-day event. Yes, it's true that Chartered Semiconductor Mfg. is sponsoring the event, but there's generic learning to be had there as well. Among this year's speakers, you'll find Bernard Meyerson, IBM Fellow and Chief Technologist at the IBM Technology Group. His topic will be: “Driving Innovation: A Business Imperative for Silicon Technology.”

Lest you think Meyerson's talk threatens to restate the obvious, the Forum Organizers say, “In the past several years, with the increasing challenge to scaling, innovation has played an increasingly important role in the progress of modern semiconductor technology. The introduction of Copper interconnects, Silicon Germanium devices, Silicon on Insulator technology, and numerous smaller materials-based enhancements, have all facilitated progress in semiconductors. Going forward into the future, such innovation moves from the role of simple technology differentiator to that of being a business imperative, required for survival. Dr.
Meyerson will explore the origins of the need for this transition, and discuss several unusual strategies for device technologies demonstrating extraordinary dimensional and energetic characteristics.” Good stuff. (


Editor's Note - In case you missed it, go read
Russ Henke's detailed analysis, “What did the Last Quarter bring?” It's posted on EDAToolsCafe and is a great read for all involved in the industry.

Applied Wave Research, Inc. (AWR) announced the appointment of additional sales representation in Europe and Asia. Under the terms of the agreements, Kataros Co. Ltd., and Euan Information Technology in Korea, eVision Systems GmbH in Germany, and Setup Electronica in Spain will provide electronic systems and IC designers with AWR products and support.

Camstar announced that Finisar Corp. has chosen Camstar's InSite as the standard throughout its worldwide manufacturing sites in the United States, Malaysia and Singapore.

Carbon Design Systems is opening its doors in Waltham, MA, and announcing the delivery of software products that enable system validation of hardware and software in an enterprise-wide environment. The Press Release says, “For the first time, critical software drivers, firmware, and diagnostics runs at KHz execution speed on the 'golden' RTL hardware model with cycle and register accuracy. This enables system and customer validation to occur much earlier than traditional methods.” Carbon says its first products target the pre-silicon system validation market.

Meanwhile, the company also announced over $5 million in funding from Flagship Ventures and Commonwealth Capital to commercialize its technology. Carbon's executive team includes Stephen Butler, President and CEO; Kevin Hotaling, Vice President of Worldwide Sales; and Bill Neifert, CTO. The company was founded in April 2002. Steve Ricci, Managing Director and Vice Chairman of Flagship Ventures, is quoted: “We are excited about the progress Carbon has made over the last year in assembling a stellar team and capturing early revenue. With the explosion in chip software content and gate counts, Carbon is uniquely positioned to address an industry wide problem in a largely

Circuit Semantics, Inc. (CSI) announced that it has closed a $1.6 million funding round. The company says that current investors VenGlobal and Crescent Ventures led the round. In addition, the company announced that it has moved its headquarters to Mountain View, CA.

IBM announced: “The Accellera EDA standards organization has approved Property Specification Language (PSL) 1.01 as an official standard. PSL, based on IBM's Sugar language will advance assertion-based verification in simulation and formal verification, the two prevailing techniques for assuring the correctness of chip design prior to fabrication. More than 40 individuals representing over 20 companies participated in the efforts to form the PSL standard from its Sugar basis. PSL is a language for the formal specification of hardware and is used by engineers to specify the functional properties of logic designs. These properties, in turn, serve as input to
property-checking tools,
which are key to modern-day functional verification. More and more EDA companies are supporting verification tools driven by PSL. To support the growing adoption of the language, IBM provides an open source Sugar parser to tool developers.”

Accellera Chairman Dennis Brophy is quoted in the Press Release: “The approval of Accellera's PSL standard, based on IBM's technology contribution, is a significant milestone for Accellera and improves the productivity of designers doing system-level design and verification. Accellera members and the PSL technical team have done an outstanding job to get PSL ready for deployment.”

Integre Technologies and Tower Semiconductor Ltd. announced that Integre has joined Tower's Authorized Design Center program. Integre is the first affiliate in North America. Tower says Authorized Design Centers are established to link Tower with IC design firms to provide customers with support for the Tower semiconductor fabrication flow.

USB Implementers Forum (USB-IF) Compliance Workshop - The workshops are held regularly to promote USB product development, validate product compliance with the specification, help foster communication between product manufacturers, and ensure that USB Peripherals operate together. Organizers say the three-day event evaluates products against the standard for Full Speed OTG with exacting tests for device interoperability, as well as ensuring strict electrical and protocol compliance. The following news items from Mentor Graphics and Synopsys hail from this event.

Mentor Graphics Corp. announced that two of its USB On-The-Go (OTG) IP cores achieved compliance certification at the USB-IF Compliance Workshop held in Milpitas, CA, in early August. The company said this was the first opportunity to test the Mentor Graphics Full Speed (MUSBFDRC) and Hi-Speed (MUSBHDRC) Dual Role Controllers against the OTG standard, and that “the certification validates the quality of Mentor Graphics IP and allows developers to integrate the company's cores with the utmost confidence, enabling the rapid creation of OTG applications.”

Similarly, Synopsys, Inc. announced that it has received the “industry's first” USB-IF certification for its DesignWare Cores USB 2.0 PHY (physical layer) IP. The company says the certified core supports all USB 2.0 speeds - high speed, full speed, and low speed - and is compliant with the USB 2.0 Transceiver Macrocell Interface (UTMI+) specification. The company also says, “The certification means that SoC designers can implement fast USB interfaces in deep-submicron geometries.”

Also from Mentor Graphics -The company announced that Intrinsix Corp. has joined its FPGA Advantage Solutions Thrust (FAST) Partner Program. The FAST Partner Program provides partners with access to Mentor Graphics FPGA Advantage tool suite, and FPGA design methodologies, training, and certification from Mentor Consulting.

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You can find the full EDACafe event calendar here.

To read more news, click here.

-- Peggy Aycinena, Contributing Editor.


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