September 15, 2003
Two sides to every story
Please note that contributed articles, blog entries, and comments posted on are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

“This arrangement allows CoWare to remain independent and focus on this problem. It's a more difficult technical problem than even synthesis was 15 years ago. If we were part of another company, that effort would get diluted. In the long term, this is critical to the EDA industry and electronics. Without it, even EDA growth would be limited. Without innovation and people pushing the edge and solving customers' problems - from railroads to high-tech - innovators keep things moving ahead. After all, even Synopsys started as a little upstart and a thorn in the side of Daisy, Mentor, and Valid.”

“It's noteworthy, that Cadence and CoWare might be right or they might be wrong here, but we're definitely taking a different approach. How do both companies solve problems in a different way, while showing some innovation from a business point of view?”

“The Cadence engineers supporting SPW have been physically transferred and have become CoWare employees, similar to an acquisition. The team and the source code have moved over and now CoWare is supporting ongoing algorithm design. There will also be other tech support between the two companies. We'll be the key link between system design and verification. Meanwhile, the engineers will work at the Cadence site and at the CoWare site. There will be regular meetings to allow the two teams to stay in sync. There will be cross licensing to make sure that the design flow for customers works out of the box in a significant way. We'll make sure linkage exists.”

“[Clearly], there are extra precautions [in place] to determine who owns which IP and to protect confidentiality. These [arrangements] are artifacts of having more than just a marketing relationship. Cadence over the last 5 years has made it clear that it respects IP - especially other people's IP. We're fine with those assurances because we want this to be a success.”

Mitch: “[The legal] agreement is reasonably elaborate involving a go-to-market strategy, the operational nature and licensing issues [of the alliance], the transfer of people, plus the equity investment. At the end of the day, however, [we're comfortable] that it's all very tight and well defined. It's unique and meant to look like a single go-to-market product from these two collaborators, who are developing markets with a consistent, unified approach from a customer's perspective. We expect both CoWare and Cadence to have leverage with all of this. It's new technology, and the nature of the deal is such that the two companies don't have a lot of customer base overlap.
There's an opportunity for acceleration for both of us here.”

Alan: “[This alliance] is something new and different. The biggest thing from CoWare's [point of view] is that now we're [playing] in a different league. CoWare will have more than 100 employees and over 3000 customers. We'll be the largest private EDA company out there, plus we'll have a great partnership with Cadence.”

“Will we be going public soon? It will be fun just to be the largest private EDA company for a while, although our plan is to build for the long term. The merger with LISATek earlier in the year, and this alliance with Cadence, has moved our [IPO] schedule out a bit. Now we want to have a bigger share of the industry. We believe, however, that within the next year and half - that's the time frame when our goals and the public equity markets will be ready [for an IPO]. [The timing] is a function of many variables.”

“Meanwhile, who's going to buy the champagne [to celebrate this new alliance with Cadence]? We think we can probably afford the champagne, but it won't be as fine a label as Cadence would probably buy.”

Mitch: “I think Cadence can probably afford the champagne.”

Alan: “I'm going to have to remind Mitch of that, the next time I see him in person.”

There are always two sides to every story:

Clearly, Cadence and CoWare think this is an important story. But VaST (and presumably others) think it's important as well, which is apparently why they sought to go on record with a rebuttal to the claims of the principals involved. Not surprisingly, the rebuttal was peppered with almost as many out-and-out marketing pitches as the Cadence/CoWare message.

Graham Hellestrand, President and CEO at VaST, told me, “The problem we see with the Cadence/ CoWare deal is that, to be successful in the system-level architecture and design space, you need very high performance software/hardware processor and platform modeling technology. You also need highly integrated tools and interfaces to industry leading software, such as MATLAB /Simulink, which dominates the signal processing market, and UML, which dominates software specification. Only VaST provides an integrated solution that meets this description.”

“We speak from a position of strength here. VaST's solutions provide the speed and accuracy necessary to serve the real-time embedded systems and EDA industries. Businesses such as automotive electronics, aerospace, cell phone, converged wireless LAN, and consumer electronics need integrated tools and high-performance, accurate models that enable them to implement efficient engineering processes for software-hardware system-level architecture and design. Everywhere there is real-time control using sophisticated microprocessor-based SOC designs, you have a need for this type of integrated solution set.”

Eventually, Graham got to the point of the call: “How the Cadence assets fit together with CoWare's design services business to create something that's useful to the customers is not clear. What we see in this deal is a mixed bag of tools and services, and that does not make a product offering. So the question for CoWare is, 'Where's the beef?'”

“We are aware that a Cadence/CoWare deal was in the making for a long time. We don't know CoWare's financial motivation, but can't see any end benefit to design engineers in this merger/ acquisition/ however-you-would-categorize-it. Customers will be committing millions of dollars to these designs, and, without high-performance models to protect their investments, I can't see how this deal will result in product offerings that will help them.”

At this point in our conversation, I asked Graham if, given the opportunity, VaST would decline or accept the opportunity to enter into a CoWare-type partnership with Cadence.

He answered, “You ask whether VaST would respond positively if Cadence were to come to us with a similar business proposition? We are business people interested in the success of our company. We would consider business proposals from anyone, including Cadence.”

That's probably sound thinking on the part of any CEO.

Industry news - Tools and IP

Cadence Design Systems, Inc. announced the shipment of its OrCAD 10.0 release, that the company says includes “new features, improved tool integration and enhanced technologies.” The OrCAD 10.0 release is intended to address specific design tasks of both PCB designers and electrical engineers by introducing three new OrCAD Unison design suite configurations - first, OrCAD Unison EE with OrCAD Capture for design entry and PSpice A/D for analog and mixed-signal simulation; second, OrCAD Unison PCB with OrCAD Capture for schematic referencing, OrCAD Layout for PCB place & route, and SPECCTRA for OrCAD autorouter; and third, OrCAD Unison Ultra for the entire design, from
schematic entry
and simulation, to board layout and routing. The additional features included in all of this are complex, subtle, and worth a second look from existing and potential customers.

Denali Software, Inc. announced an agreement with HP to provide configurable memory controller cores and memory modeling solutions for the design and verification of chips used in HP's imaging and printing products. Denali Databahn memory controller cores are being used in HP chips to interface with double-data-rate (DDR) memory devices. The companies say the arrangement also provides HP with Denali's MMAV product for modeling and simulating the interactions between the HP chips and external memory devices for design verification and performance analysis.

Intellitech Corp. announced the availability of the NEBULA Silicon Debugger. The company says NEBULA reduces test-vector debug time from weeks to less than half a day through direct knowledge of on chip DFT (Design-for-Test) structures and integrated use of Synopsys TetraMAX ATPG patterns and diagnostics. NEBULA permits remote testing of prototype silicon for stuck-at faults, path-delay faults, at-speed BIST, and in-situ functional debug. Failures can be isolated to the gate and net level with access to the TetraMAX fault-simulation database for lookup of ATPG faults. The NEBULA acronym is “loosely translated” as Network Based debug and
Logic Analysis - the debug and validation
platform is remotely accessible by design and test engineers over a wide area network. The tool understands the difference between serial scan test data and parallel pin test data, which allows engineers to debug using functional elements of the design rather than counting 'bits' from tester channel results. The company says that architecture and scripting language enables complex decision-making during execution of test programs that is not possible with memory-behind-pin tester architectures. The NEBULA platform also understands the DFT infrastructure inserted by Synopsys tools.

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-- Peggy Aycinena, Contributing Editor.

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