September 29, 2003
Make New Friends, but Keep The Old
Please note that contributed articles, blog entries, and comments posted on are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

SOPC World 2003 - System on a Programmable Chip 2003 is Altera's global annual design conference that the company says brings together system architects, designers, and manufacturing executives from around the world to learn about the latest applications, features, and benefits of using programmable logic technology. The company says this year, if you come, you'll see detailed technical sessions and hands-on demonstrations - importantly with no charge for attendance. Topics include developing custom peripherals and instructions for embedded programmable processors, using advanced FPGAs to solve high-speed design, signal integrity, and board layout challenges, using FPGAs to simplify
high-speed memory interfacing and control, and implementing DSP functions in FPGAs for greater performance and lower cost. Naturally Altera products will be front and center, but if you're still bringing yourself up to speed on programmable devices, you should be planning to attend nonetheless. The conference is happening across a plethora of locations from late September through mid-November. (

X-FAB Lunch & Learn Seminar - Organizers says the seminar will cover the challenge of design and testability of embedded non-volatile memories and ESD protection methods for mixed-signal and high-voltage designs, October 7th in Irvine, CA, and October 8th in Santa Clara, CA. Holger Haberla will talk about “IC-Design and Testability of Embedded EEPROM and Flash Memory Options in mixed-signal Environments” and Cornelia Foss will address "Enhanced ESD Protection Methods for mixed-signal and high-voltage Designs." The event is free, so why not plan on attending. (


Cadence Design Systems, Inc. says it will join with Russian education and industry leaders to mark “key milestones for a Cadence-sponsored master's program centered on analog/mixed-signal SoC design at the Moscow Institute of Electronic Technology (MIET). The event, which will be held at MIET, will focus on progress made with the International Institute of Device and System Design, a program begun last year to develop curriculum for and train Russian engineering graduate students seeking an MSEE. MIET Rector.

Yuri Chaplygin and Spencer Clark, Cadence Vice President and Chief Learning Officer, will be among the officials offering remarks. Milestones achieved thus far include the following: all 23 remaining students from the initial class are beginning their final term and are working in Russia as part of their study programs, all have post-graduation job offers, the two-year, four-term MSEE curriculum in analog/mixed-signal design has been completed, 27 students have been selected through a competitive process for the second class and began their first term on Sept. 1.

Cadence says the foundational program is designed to benefit Russia's high-tech industry and community by developing a “continuous stream of master's degree graduates highly knowledgeable in analog/mixed-signal design.” The International Institute of Device and System Design is one of several global initiatives by Cadence and the second in Russia. It offers 24 technical courses as part of a comprehensive two-year MSEE curriculum. Many of the students are expected to move on to positions with international technology companies operating in Russia. The program is
administered by Mirantis Inc., a company based in Foster City, CA. Cadence donated computer equipment and software licenses, instructor funds and student stipends, and provides technical guidance and training.

Mentor Graphics Corp. announced that Avnet Cilicon has joined its FPGA Advantage Solutions Thrust (FAST) Partner Program. The company says that through the FAST Partner Program, Avnet Cilicon will receive access to Mentor Graphics' FPGA design tools, methodologies, and training and can serve as a certified Mentor Graphics design resource to customers implementing FPGA design.

Open Core Protocol International Partnership (OCP-IP) and Silicon Integration Initiative (Si2) have announced memberships in each others respective organizations, saying that mutual memberships will allow the industry organizations to collaborate more closely and gain a greater awareness of the direction for each organization. Both organizations say they believe working together will increase awareness in the design community, while at the same time illustrating and strengthening the belief that open technologies are the wave of the future.

Steve Schulz, President of Si2, is quoted in the Press Release: “While Si2 is currently focused on the overall design flow, OCP-IP supports those same goals by standardization of SoC IP interfaces. Collaboration by both organizations will greatly benefit the industry as a whole.”

Meanwhile, Ian Mackintosh, President of OCP-IP, is quoted: “As the only truly open, fully supported industry standard socket, it is important that OCP-IP enter relationships such as this; that facilitate improved collaboration, helps us communicate to our memberships and thus better serve industry interests. We look forward to working with Si2 in the future.“

The VSI Alliance (VSIA) announced a strategic alliance with the Fabless Semiconductor Association (FSA), the purpose of which according to the two organizations is to accelerate the adoption and rollout of the VSIA Quality IP (QIP) Metric, and to further extend it to accommodate hard IP including silicon verification. The work extending the QIP Metric will be done jointly in VSIA's Quality Development Working Group (DWG). Under the agreement VSIA has established a Hard IP sub-DWG within the Quality DWG and appointed Vin Ratford, FSA member and Chairman of the IP Education Working Group of the FSA's IP Committee, as Chair of the new sub-DWG. The FSA will also provide resources
the sub-DWG to assist in developing the Hard IP extension for the VSIA QIP Metric.

The FSA and VSIA say they expect to have the Hard IP extensions in place within 12 months. Members from both organizations will have free access to the VSIA QIP Metric for Soft and Hard IP. The FSA and VSIA will be promoting the use of the Metrics as they become available to their members. The FSA will also create and lead an additional working group focused on the rollout of the QIP Metric to the fabless community. VSIA members will be invited to join this group. At the same time, VSIA will create and lead a QIP Adoption Group that will focus on technical issues of adoption including tools to automate the process of generating and verifying the final score. FSA members will be invited to
join the QIP Adoption Group.

VCX Software, Ltd. announced that it has been incorporated as a privately held entity, formally acquiring all assets of the Virtual Component Exchange (VCX), including the IP portal, the underlying technology, expertise, and staff of VCX. The new company says its corporate structure and name reflect the company's focus as a commercial, integrated software provider for the EDA industry. The previous entity was funded in part by Scottish Enterprise and in part by a large group of private companies, and created and managed an on-line IP listing and exchange service.

The new company says its business model will include client-server based software tools, web-service packages, and data services that will improve time to market and the costs of IP for providers and semiconductor foundries. Simon Davidmann, founder and president of Co-Design Automation, has been named as Chairman of the Board. Andy Travers will be CEO, Thierry Marcelis will be COO, and Pat McTaggart will be CFO.

I had a chance to talk briefly by phone with Andy Travers about the announcement. His comments were wrapped in a brilliant Scottish accent: “VCX was formed five or six years ago and designed to be an exchange for buyers and sellers of IP. The buyers could browse listing and use templates for acquisitions of IP - the whole thing was backed by the Scottish Government.”

“But we've changed [that model]. Now we're privatized and have acquired all of the assets of the old VCX. We're no longer focused on being a central repository for IP, and are working instead on custom solutions for both buyers and sellers. This is a very big change for us that comes out of necessity and natural evolution. The necessity arises from the paranoia and fear of those providing IP, which affected the success of a central IP exchange. We realized a year or so ago, that people wanted a different type of IP exchange environment. We had started to work with companies for custom
solutions through web facilities, the packing and transferring of IP between companies. Those companies started feeding back to us that they preferred that we be a strictly commercial entity. You would think they would have wanted to get something for free through a government-sponsored entity, but the customers actually preferred that we be motivated by money and not by [what they were concerned might be] hidden government agendas. This conversion to a privately held company was essential for some of our more serious customers.”

You can find the full EDACafe event calendar here.

To read more news, click here.

-- Peggy Aycinena, Contributing Editor.


Review Article Be the first to review this article

Featured Video
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, California
Director, Business Development for Kongsberg Geospatial at remote from home, Any State in the USA
Director, Business Development for Kongsberg Geospatial at Ottawa, Canada
Upcoming Events
IPC Technical Education - PCB Layout - Place and Route at Del Mar Fairgrounds 2260 Jimmy Durante Blvd. Del Mar CA - May 2, 2018
IPC Technical Education at Wisconsin Center 400 W Wisconsin Ave. Milwaukee WI - May 8, 2018
IPC High Reliability Forum at Embassy Suites: Baltimore-At BWI Airport 1300 Concourse Drive Linthicum MD - May 15 - 17, 2018
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise