October 20, 2003
Testing, Testing, 123
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

When I suggested that he might be one of those academics who was “wonderfully pragmatic,” he said those were exactly the words that I should use in describing him - those and the words, “handsome, suave, and sophisticated.”

(Unfortunately it was only a phone call, so probably best to maintain a healthy level of skepticism with respect that last bit until independently corroborated.)

Meanwhile, it's clear that Ambler's got more than just a simple dollop of British wit and charm on his CV. He's a fellow of the IEEE, author and editor of numerous texts on test economics, served as Program Chair and General Chair for the IEEE International Conference on Computer Design (ICCD), General Chair of the European Design and Test Conference, as well as Program Chair and now General Chair of ITC. He's also on the editorial boards of IEEE Design and Test; and the Journal of Electronic Test, Theory and Application.

Maybe the best words are, “Busy guy.”

Testing 2 - Cadence and IBM

Rahul Razdan is Corporate Vice President and General Manager of the Cadence Systems and Functional Verification Group. I spoke to him several weeks ago in conjunction with Cadence's ITC announcement regarding the IBM test tools and technology acquired by Cadence in September 2002 - now being marketed as Cadence Encounter Test Solutions.

Prior to Cadence, Razdan served in various capacities at both DEC and IBM, where he worked extensively in ATPG (automatic test pattern generation) technology. His PhD (from Harvard) is in the area of dynamically configurable compute engines. He has more than 20 patents in computer architecture, hardware design and software design. It was interesting to hear what he had to say.

“IBM has been the leader in Test forever. In fact, most players have some genesis back to IBM relative to their core products. Cadence [was delighted] to acquire the Test Group from IBM [out of Endicott, NY] last year. Our message at ITC was that we're now announcing the general availability of these products in the market place."

“We're calling the one portion of the new product the Encounter Test Design Edition and it's aimed at the design team. It includes ATPG, fault generation, compression, scan insertion - all of which are available from our competitors - but we're offering additional functionality on top of that. It's really unique compared to the general offerings out there.”

“Additionally, the product is capable of handling designs of over 70 million gates. It's true, currently there are not many designs of that size, but they're definitely beginning to show up. Certainly 30 to 40-million gates is not uncommon today.”

“We feel that our new product offering is unique in many ways. It can handle delay faults - IDDQ testing has caught this failure mechanism in the past by measuring electrical characteristics of the design and determining leaks. But that mechanism has become increasing ineffective. The baseline environment is too noisy to allow IDDQ to be accurate. Therefore, our ATPG engines are generating tests especially for IDDQ faults. Of course, the number of tests generated ends up being much larger. So there's also a focal point for compression. The [subsequent] loss in granularity can sometimes be a problem, so a cost/benefit analysis allows the designer to choose from a range of compression
analysis choices. There's never a free lunch in test!”

“Also, traditional fault models used stuck-at fault models. But the actual failure mechanism is more complex than that. You need to understand the whole system - pattern faults have multiple stuck-at faults, link faults, all needing an approximation model. That has been addressed in our new offering as well.”

“The other portion of our new product is called Encounter Test Manufacturing Edition. It's going after the manufacturing side of the business - the fundamental problem on the manufacturing floor when something's not producing the yield and you need to know why. It's a diagnostic that lets you take the netlist of a design and the failure test vectors, and figure out with some high degree of probability where the failure occurred, irrespective of where the failed test vectors are generated from. The product is aimed at accelerating yield. We feel that by offering that capability, we can now offer a full solution for linking test to design.”

“We know that DFT is connecting increasingly to the ATE world, and we see ourselves as part of that process. We want to connect with all of the ATE players and believe we're offering the basic 'operating' system that connects the design, manufacturing, and ATE communities. Our strategy is to have design-aware manufacturing and manufacturing-aware design - the whole linkage from scan insertion and BIST (built-in self test) to providing a sufficient notion of a design to allow for fault isolation on the manufacturing floor. And, we'll be linking more and more to OpenAccess from the manufacturing floor.”

“Prior to our purchase [of the IBM tools], Cadence didn't have much by way of test offerings - it was a 'hole' in our portfolio. This purchase is a good one for Cadence. It's also good for IBM. IBM asked themselves, from an investment point of view, 'How do we get what we want relative to the solutions that we need?' There was an investment angle there that made sense for IBM. Also, they had a completely proprietary solution used extensively as part of their ASIC business, which they knew to be a possible impediment to adoption. Both of the these factors - investment and adoption - led to the Cadence purchase.”

“Now we're driving the technology from within Cadence, although the collaboration with IBM is still on going. They have the ability to direct, at some level, the R&D within Cadence - the collaboration between the two companies will continue to be very close. Of course, IBM has always had the chance to shop around [for test vendors], but now they're predominantly using the tools out of Cadence. The nature of the solutions that are currently available in the open marketplace are such that they don't really match up to the needs that IBM has or had. I don't expect that situation to change as long as Cadence is on the technical edge.”

Testing 3 - Zorian honored

Virage Logic Corp. announced that Yervant Zorian has been named by EETimes as one of a select group of key individuals who have influenced the course of semiconductor development technology. Zorian is one of 13 so honored. The final list was based on input from the EE Times editorial staff, with Editor-in-Chief Brian Fuller overseeing the process.

The Press Release from Virage says, “Zorian is currently Vice President and Chief Scientist at Virage. He pioneered work on embedded test technology and is acknowledged as one of the world's leading experts in the field. Zorian founded and currently chairs the IEEE P1500 Standardization Working Group for embedded core test, and has authored over 200 papers and three books. Previously, Zorian was Chief Technical Adviser at LogicVision, and prior to that a Distinguished Member of Technical Staff at Bell Labs. He is Vice President of the IEEE Computer Society for Technical Activities and Editor-in-Chief Emeritus of IEEE Design & Test of Computers. He received an honorary doctorate
from the
National Academy of Sciences of Armenia and is a Fellow of the IEEE. Zorian has an MS from the University of Southern California, an MBA from the Wharton School of Business, and a PhD from McGill University.”

Tony Ambler, General Chair of ITC 2003, said, “Yervant has done a tremendous job in facilitating dialog and encouraging others to participate in the field. He was the person who made the Test Technology Technical Council a leading force in the industry. And, of course, he's played a leading role in the creation and development of standards, in particular IEEE P1500. He's very versatile and gets around to talking to just about everybody on many topics.”

Zorian is also a gentleman and a scholar. A number of years ago as a new staff member at ISD, I was told that my first Focus Report for the magazine would discuss test. To bring me up to speed, I was sent to talk to Zorian. Not only was Yervant extremely informative, but he was also infinitely polite in answering my many questions. For that courtesy, I continue to be grateful and I congratulate him on his most recent honor.

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-- Peggy Aycinena, EDACafe.com Contributing Editor.


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