December 01, 2003
Virage Logic's Adam Kablanian
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Peggy Aycinena - Contributing Editor

by Peggy Aycinena - Contributing Editor
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“Today, cell phones and graphics chips are driving 90 nanometers. At 90 nanometers, it costs $20 to $30 million to design and produce SoC chips. You're not going to see too many fabless companies with that level of R&D investment. It's going to change the way chips are designed and produced. You're going to see more and more movement towards programmable chips, products from Xilinx or Altera or LSI with their structured ASICs, where most components are pre-fabricated and designed, and you get quick turnaround by designing onto a platform. That's also a reason you'll see more migration of hiring to India and other places. If you look at a $30 million cost for SoC development, $20
of that is engineering salaries. Moving off shore will reduce the R&D barrier for designing chips. It's really all being driven by the economics [of the situation].”

Turning to current issues, Kablanian says Virage went through a transition plan a year ago: “We decided to extend our offerings beyond embedded memory. Our customers were asking us to offer more physical IP. At this point, we have over 220 customers, and the company is very global in nature. We have customers in Malaysia, China, Japan, Europe, and Israel. We've had to develop a global infrastructure to help us serve that customer base.”

“And we're happy to be working today in 90 nanometers - we've got 15 customers signed up, have silicon-proven products, and our programmable standard cells will help. LSI's RapidChip technology is really good with our programmable standard cells. We don't have a programmable platform, but we have the elements to make that technology viable.”

Kablanian pauses before answering, 'Where will we be in 5 years?'

“The IP industry is going through a rapid consolidation today, and we believe we'll be approaching a new maturity level over the next 5 years. There are many forces at work in the industry - forces that come through the customers and through the food chain. That's why we want to branch out beyond memory and look at the entire IP world with our new platform strategy. It's an exciting era, one that I view as offering a great deal of potential. I foresee that today's chip will be tomorrow's IP.”

“[But in fact], so much changes in just one year, it's really difficulty to have a 5-year plan. We do have 3-year planning with our financial model - revenue projections, what type of products we will need to design to meet 65 nanometer and 45 nanometer customer requirements. On the business side, we're recognizing that the industry will go through further consolidation. So we look at different scenarios in terms of how we position the company. That's certainly my vision for the company. We do have definite companies that we'll be pursuing in the next year in order to create bigger value for the industry and for our shareholders.”

Kablanian says, “We always see ourselves as an extension of our customers' R&D - they're extending their R&D resources to tap into commercial IP. Our IP is very custom, never cookie cutter. However, everything we build is useful for many people. The leverage with IP comes with finding the larger customers who can use that standard form. However, there will always be specialized structures for specific applications. You can't just have a product and hope that it becomes commercialized, [neither can] you just lock up the marketplace and work on your next product. The demand and the standards are always changing. The dilemma - or strength - for IP companies is that they need to
innovate. In fact, it's only those who continue to innovate who will continue to succeed. We have committed over 35% of our revenue in recent years to R&D. That's a key metric for us to remain as a star IP company.”

“There's actually a second way of looking at this. Our customers want us to be successful. In order for them to manage their own IP costs, they need to compromise and allow us to use our products in the larger market. Also, they often want us to provide them with standard products, but to maintain and improve those products over time. If something we provide to them is just custom, they increase the risk of the IP not being maintained or becoming a niche product - which means it would lose momentum for the next generation. It's to the benefit of our customers to work with us to standardize IP, to help us to reduce the cost of providing IP. Yes, you could describe the situation as one
there is a virtual R&D department that spans across multiple corporate firewalls.”

“If you look at large IDM manufacturers today, every one of them has a different way of designing chips. For us, that means we need to make our interface with our customers such that they feel that we are an extension of their internal culture. This is the challenge that every IP company faces. Our customers look to us to provide quality IP - the most important thing being that the silicon has been validated or proven. That's almost a bigger value than the IP itself. In that sense, it benefits IP companies to come up with a way to certify the quality of IP. It's only then that we will be able to grow the IP market. Certification - something like an ISO 9000 - would provide a
advantage and an industry wide benefit. We could see FSA driving that effort. Certainly many people are reviewing the issue and I'm encouraged to see that it's an issue being discussed. My hope is that this will benefit not just us, but all of our colleagues in that space.”

“Today, with the world being what it is, it's very difficult to enter the market. But, there are still great opportunities out there. Even today, a company can grow if you're passionate about your work and if you can provide value to your customers, value not available from your competitors. Everything I do, I'm passionate about - my work or my co-workers or my family. Everything I do is because I'm pursuing my passion.”

Industry News - Tools and IP

Accelerated Technology announced that its Nucleus RTOS has been used by Garmin International to develop the CNX80 navigational GPS designed for general aviation. Per the Press Release: “The CNX80 GPS allows a pilot to file a flight plan, receive clearance, and program the approved flight plan. The CNX80 GPS includes the industry's first certified wide area augmentation system (WAAS), which dramatically improves the accuracy, integrity and availability features of the GPS and provides for a safer flight of an aircraft. Garmin developers looked for an RTOS that they could certify through the FAA to meet the airborne software requirements from DO-178B for Level B software.
Certification requires adequate documentation that every decision point in the source code is fully tested to ensure safe operation of an aircraft. Developers tested the Nucleus PLUS kernel and received FAA certification with no changes required.”

AirDefense, Inc. announced that Synopsys, Inc. is using AirDefense tools to “protect its wired corporate network from unauthorized wireless LANs and enforce security and management policies across its sanctioned wireless LANs.” Synopsys says its global wireless LAN connects 81 offices in 11 countries. Van Nguyen, Director of Security for Synopsys, is quoted in the Press Release: “Synopsys evaluated the market for WLAN monitoring, including AP switching and scanning vendors, and quickly recognized the need for a dedicated sensor- based system with centralized policy monitoring and enforcement. Only AirDefense could provide this level of security and policy
enforcement. Synopsys
chose AirDefense for their robust intrusion detection engine that does not overwhelm you with false positives.”

HDL announced a “major update” to its family of functional verification tools on November 17th - @Verifier and @Designer Version 4.0 - which the company says delivers “technology to significantly improve the productivity of design and verification teams working with the new assertion languages of Accellera PSL and SystemVerilog.” Ravi Selvaraj, Senior Director of Engineering at SiNett Corp., is quoted in the Press Release: “In establishing our verification methodology, we determined from the outset that the use of assertion-based methods would be key to our delivering high density, innovative silicon solutions for the wireless LAN market. Our engineering
team will be making extensive
use of PSL to create a robust verification flow. SiNett selected @HDL based on the PSL support in their @Verifier product, as well as the tightly integrated assertion and simulation debugging capabilities in @Designer. We can see that the @HDL Assertion Studio technology will be instrumental in developing effective assertions for validating our RTL in a timely fashion.”

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-- Peggy Aycinena, Contributing Editor.

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