February 09, 2004
From Glum to Glittering
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!


Per the Press Release: “Sensor system developers typically connect an FPGA or microcontroller to mixed-signal products with heavy analog content. The ViaPATH structured ASIC routing software addresses the needs of these customers, who are currently using FPGA or common off-the-shelf processors and want an affordable custom IC.” Dan Wrappe, CEO of Triad Semiconductor, is quoted: “Using ViaPATH, we can quickly convert digital hardware descriptions to custom silicon that is interfaced to our mixed-signal ICs. The result is a cost-effective chip set. Combining ViaPATH with our core strength in mixed-signal technology allows us to continue to evolve products towards a complete
sensor system on a single chip.”




Coming soon to a theater near you


FPGA 2004 - The twelfth annual ACM/SIGDA International Symposium on Field Programmable Gate Arrays will be happening in Monterey, CA, from February 22nd to the 24th. Not surprisingly, sponsors include Altera, Xilinx, and Actel. There will be 24 papers and 42 poster presentations, with topics set to include new programmable architectures, CAD tools for programmable logic, rapid prototyping platforms, FPGA-based computing engines, and novel FPGA applications. (


Structured ASICs - LSI Logic and Synplicity are presenting a series of seminars - “The Platform ASIC Solution” - across a range of venues in North America in February and March. If you make it to FPGA 2004, you'll probably also want to get to one of these seminars as well - just for the sake of comparing and contrasting the technologies. (




Newsmakers


Adveda B.V. is opening its doors and has announced the “commencement of business as a software provider for the functional verification of both hardware and software, which merges the hardware and the software developments of a System-on-Chip (SOC) design.”


The new start-up is based in Eindhoven, The Netherlands, where Cor Schepens will serve as the company's CEO, Huub Erens is CFO, Henk Aerts is CTO, and Marc Seutter is Chief Architect of hardware tools. The company has also announced its flagship product this week, Miss Univers.


I had a chance to speak by phone with Cor Schepens on February 5th. He was speaking from his office in The Netherlands. Schepens is a well-spoken individual, at ease on both the technical and business sides of the start-up equation.


He told me: “We started with this idea a year ago. I knew that Henk Aerts was working on software tools, building a generator for fast ISS models. He had built a software debugger around that idea as well. It was great stuff and I thought it might be possible to build a company out of this. One or two weeks later, I thought of an old colleague who was working in his spare time on a hardware simulator. I thought, 'Hey - if we can combine this, we'll have a very unique offering.'”


“I checked with them and asked if they would be interested in making such a company, and we agreed. This process is exciting and exhausting at the same time, but we expect to see it paying off over time. At the moment, we're all working quite late each day getting ready for DATE and doing the things we need to do to get organized. We're busy building our tools and, technically speaking, we are ahead of schedule. But, business issues are time consuming and since we are not a big company, we are having to hire contractors to help with those things right now.”


“When we began, we knew we needed to find some financing, which can take a while. [Luckily], we found our business angel, who is now participating in the company, as well, in his spare time. Normally [people believe] that it is a lot easier to get funding for a start-up in the U.S. because Europe is a lot more conservative, especially in Holland. When you look for funding in Europe, people don't always know what EDA is and can't judge if they should take the risk [of investing]. I had one VC interested in us - one who did have knowledge of EDA - but they simply stated to us that they are investing [today] in companies that have already been out there for a few years. But they did say
that
they thought [our technology] was very interesting. It is easier to find venture capital in the U.S. where there is some awareness of EDA. [However], as we were about to get money from the U.S., we found our business angel here in Europe.”


“How did we come up with the name of the product? [Laughing] - We had another name earlier, Veronica for Verify Electronically. But the product provides unified verification, which was Univers, so we came up with Miss Univers.”


“There are lots of other companies with software debuggers or IDEs, integrated development environments. On the hardware side, there are some fast cycle-based RTL simulators, but the most used RTL simulators are still traditional event-driven simulators. Other companies are really making an interface tool. Mentor's Seamless is the main competition here and they are just an interface tool. You still need a software tool chain for a processor, plus you need your RTL simulator. The RTL simulator is really the bottleneck here if you're doing hardware/software co-simulation because it's running 1000x slower than the software part. Our cycle-based approach improves on that.”


“Our main [focus] is hardware/software co-verification. We've integrated the hardware and the software part, so right now if you look in that narrow band, we have no competition for this product. I believe hardware/software co-verification is a growing market. The RTL and software debug markets are mature now. That makes it all the more interesting for us, because in a growing market you can introduce a new tool a little faster.”


Apache Design Solutions Inc. announced a finalist in two categories for EDN Magazine's Innovator/Innovation Awards. The awards program honors outstanding electronic products and the engineers who invent them. EDN asks its audience of electronics engineers and managers to use an online ballot to select the final winners, although the magazine's editorial staff and Editorial Advisory Board also take part in determining the winners. Per the Press Release: “Apache's founding R&D team - Shen Lin, Norman Chang, Weize Xie, and Yu Liu - is one of four finalists, and the only EDA team in the 'Innovator of the Year' category. Apache's team is the first EDA team in seven years to be
nominated
in this category. Apache's RedHawk-SDL is one of four finalists in the 'EDA Physical Analysis' category.”


Cadence Design Systems and the 49ers Foundation announced that they have chosen the Children's Discovery Museum of San Jose as the 2004 beneficiary of the 11th Stars & Strikes fund-raiser. Cadence underwrites and organizes the Stars & Strikes bowling tournament, which features both Silicon Valley and celebrity bowlers raising funds for selected community programs. The goal of this year's event is to raise at least $500,000 for the Children's Discovery Museum. Proceeds from the event will aid in the construction of an 8,600 square-foot outdoor learning laboratory.


Virage Logic Corp. announced the appointment of Mike Seifert to the post of CFO for the company, responsible for all financial, administrative and operational aspects of the company, Seifert will report to President and CEO Adam Kablanian. Previously, Seifert was with Southwall Technologies, a manufacturer of thin-film coatings for electronic, automotive and architectural applications, SiteSmith, SmartDB Corp., Wayfarer Communications, PMC-Sierra, and Ernst & Young. Seifert has a B.S. in commerce, with a major in accounting from Santa Clara University.




Bits & Bytes


1 - Atmel offers solace after My Doom attack


Per the Press Release: “Atmel Corp. executives said that the company's Trusted Platform Module (TPM) ICs could help prevent identity theft, such as those perpetrated on Best Buy and PayPal customers last summer, as well as viruses and worms, such as MyDoom, Sobig.F and Blaster. In just one week, Blaster infected 500,000 computers and caused an estimated $1.3 billion in financial losses. Last week's MyDoom virus is reported to be the fastest spreading ever, infecting one in 12 PCs. Atmel's TPM chips provide secure hardware-based, storage and management of the user's identity, passwords, and encryption keys, unlike most software-only security solutions.”



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-- Peggy Aycinena, EDACafe.com Contributing Editor.




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