PCB and package co/design and co/optimization, Dec. 1
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PCB and package co/design and co/optimization, Dec. 1

Event status: Not started ( Register)
Date and time: Thursday, December 1, 2011 8:30 am 
Pacific Standard Time (San Francisco, GMT-08:00) 

CST Leading Technology Webinars on EDA
Panelist(s) Info:
Antonio Ciccomancini Scogna received the PhD degree in Electrical Engineering from University of L’Aquila, Italy in 2005. He is currently Principal Engineer at CST of America, Framingham, MA. His research interests includes EMC numerical modeling, printed and integrated circuits, electromagnetic packaging effects, signal integrity and power integrity analysis in high speed systems. He has authored more than 70 publications and serves as reviewer of many international journals.
Duration: 1 hour
The drive for higher performance leads to increasing complexity and miniaturization of electronic circuit on-chip, more functionality on package level and high density PCB boards. PCB/Package designers are therefore taking the electrical environment via Co-Design and Co-Optimization into account. This webinar addresses the challenges in modeling and simulation for PCB package Co-Design and Co-Optimization.