The EDA industry is an important part of the electronics industry and yet at times the two sets of companies do not speak the same language. Even within the EDA industry many terms get misused. Sometimes this is intentional, other times accidental. There have been attempts to define common terms but just as they seem to be getting established, one company or another seeks to modify them for their own marketing good. I am not going to cite any of the latest examples of this as there is plenty of discussion about it going on in the ESL forum at http://ElectronicSystemLevel.com/phpBB/index.php Instead I want to focus on the positive aspects of the process and bring attention to how everyone can help to overcome these difficulties.
One such effort, that continues today started many years back in the U.S. military. While that was a distributed effort, it came together in a RASSP program to create a taxonomy for models with the intention of allowing producers and consumes of models, IP, to be able to communicate about the abstractions of those models and their interfaces. That work was taken over by VSIA who updated and extended the taxonomy into a number of other spaces such as functional verification, platform based design and hardware dependent software. Two years ago, I was involved in an effort to update those documents and publish them in book form. Taxonomies for the Development and Verification of Digital Systems, published by Springer was the result.
More recently, I partnered with Grant Martin and Andrew Piziali to write a book on the subject of ESL. With that I soon realized that along with a whole set of new terms that needed to be defined, the taxonomy for describing models and abstraction also needed to changed. What I realized is that although the existing taxonomy was good at describing abstraction, it did not defining other important attributes of a model, such as the degree of concurrency in the model. This is a rather important thing to know because it will affect how that model can be used and how well it represents the solution that you are trying to create. It also distinguishes many of the emerging languages being targeted at the ESL space. Where there is concurrency, there is communications, and this too can be done in many ways - and thus the second new attribute axis for the ESL taxonomy. The final new axis is configurability, and this one is a lot more difficult to explain in a short space. It is an eme!
rging area for ESL and basically indicates the degree to which partitioning and mapping decisions can be deferred through the design process. This taxonomy was released in the book "ESL Design and Verification: A Prescription for Electronic System Level Methodology", published by Morgan Kaufmann/Elsevier.
There is another effort that is just starting and you can get involved with. This is a new committee within Accellera that is chartered with defining coverage models. Coverage is an area in which EDA vendors - almost but not quite entirely - agree on what some of these coverage models mean, but leaves the end user frustrated because different tools give different answers when running the same testcases on the same models. If you are interested - get involved. Faisal Haque is the chair of the committee and I will be chairing the sub-committee on terms and definitions. You can find us on the Accellera website under the UCIS committee.
Let's keep the industry speaking the same language and if you do not like it when a vendor deviates from the industry definitions - tell them. Protecting our terms is everyones job.