As is common knowledge in the EDA industry FPGAs (Field Programming Gate Arrays) and ASICs (Application Specific Integrated Circuits) are at opposite poles of the logic market. The table below presents a qualitative comparison.
These characteristics make one approach more attractive for certain kinds of applications and the second approach for other kinds of applications. High volume, cost sensitive applications would favor ASICs, while applications with low volumes, time to market pressures and high cost would favor FPGAs.
Many firms use FPGAs during the early design phase and preproduction phases and then switch later to ASCI for volume production. For applications whose future commercial success is unknown the FPGA route offers lower risk Some firm may use FPGAs to establish a presence in a new or emerging market thereby gaining first mover advantage at a time when cost is not the dominant factor in the customers' mind. With the increasing NRE costs for ASICS and the shrinking market windows, particularly in the consumer products sphere, FPGAs are becoming increasingly attractive. According to Gartner Dataquest the number of FPGA/PLD starts in 2003 was around 80,000 versus almost 3,800 ASIC starts.
Xilinx, the industry leader in FPGAs, estimates the total logic market at $57 billion composed of ASIC $14.0B, PLD (Programmable Logic Devices) at $3.3B, ASSP at $31.5B and other general purpose logic at $8.5 B. The PLD market consists of FPGA at $2.8B and CPLD at $0.5B. Obviously, Xilinx and its competitors would like to find ways to expand the market for FPGAs. There are two general approaches. One approach is to lower the per unit production cost of FPGA to attack the low end opportunity and the other is to increase its capability to compete at the high end for high-performance DSP, high-speed I/O, embedded processing and next generation applications. Unit production costs can be lowered by leveraging 90 nm technology and 300 mm wafers. Cost can also be lowered by designing FPGAs with less processing power, less memory, smaller feature sets and so forth.
For the last quarter Lattice Semiconductor reported that FPGAs at $11 million constituted 18% of total revenue while growing 24% year over year. Altera said that FPGA accounted for 69% of total revenue while growing 73% year over year.
Xilinx was founded in 1984 and shipped its first commercial product in 1985. Today Xilinx employs around 2,600 people. Xilinx claims more than 7,500 customers worldwide and more than 50,000 design starts. This amounts to more than half the world demand for FPGAs. Based on calendar 2003 revenues, Xilinx estimates it is now the third largest ASIC company worldwide.
As a "fabless" supplier, Xilinx partners with leading semiconductor manufacturers such as IBM Microelectronics, UMC (United Microelectronics Corporation) and Seiko. Xilinx has collaborated with UMC as its primary manufacturing partner for high-volume production of the Xilinx programmable chips. In March 2002, Xilinx commenced a manufacturing collaboration with IBM that resulted in the integration of IBM's PowerPC microprocessor with Xilinx FPGA technology to form a new type of hybrid chip family, the Virtex-II Pro, for use in communications, storage, and consumer applications. In June 2002, the companies announced a second technology agreement under which IBM is licensing FPGA technology from Xilinx for integration into IBM's Cu-08 ASIC product offering. Xilinx is producing programmable logic devices on a state-of-the-art 90 nm .13 micron process and utilizing the cost efficiencies of 300mm wafer manufacturing.
In March 2002, through partnering with IBM, WindRiver Systems, and Conexant, Xilinx delivered the Virtex-II Pro programmable system solution. Virtex-II Pro FPGA includes programmable logic fabric with up to four high-speed embedded PowerPC processors and integrated 3.125 gigabit RocketIO serial transceivers.
In December 2003 Xilinx unveiled its new Application Specific Modular Block (ASMBL pronounced as "assemble") architecture. At the heart of the ASMBL architecture is a modular framework of silicon subsystems, enabling a new FPGA development methodology for rapid and cost-effective deployment of platforms targeted to different application domains. The new highly modular ASMBL architecture makes use of advanced flip-chip packaging technology and eliminates geometric layout constraints associated with traditional chip design such as hard dependencies between I/O count and fabric array size. The ASMBL architecture also addresses the increasingly more stringent requirements for on-chip power and ground distribution by allowing power and ground to be placed anywhere on the chip. The architecture also enables the scaling of hard IP. The Xilinx designers can vary the number and ratio of different functional columns to create a platform or family of different sized devices, each best suited for a certain domain of applications depending on the desired type of functional attributes. Platforms can be created with different mixtures of columns based features: logic, memory, DSP, processing and high-speed I/O. This approach enables the right feature mix at the lowest cost.
On June 7 Xilinx unveiled details of its fourth generation in the Virtex product, the Virtex-4 Platform FPGAs. Since its 1998 introduction, the company has shipped over 15 million Virtex devices and generated nearly $2.5B in cumulative revenue. The Virtex-4 Platform product line based upon ASMBL architecture offers multiple domain-optimized platforms. The initial Virtex-4 family includes three platforms; Virtex-4 LX for logic, Virtex-4 SX for very high performance signal processing, and Virtex-4 FX for embedded processing and high-speed serial connectivity. Each platform will offer a range of device options, a total of 14 devices.
The LX Platform FPGAs are optimized for general logic applications and offer the highest logic density and most cost-effective high-performance logic and I/Os. The SX Platform FPGAs are optimized for very high-performance signal processing applications such as wireless communication, video, multimedia and advanced audio that may require a higher ratio of XtremeDSP slices to logic. The FX Platform FPGAs are assembled with capabilities tuned for complex system applications including high-speed serial connectivity and embedded processing, especially in networking, storage, telecommunications and embedded applications. The embedded-processing domain is dominated by control flow operations involving complex data types. The connectivity-domain involves message-based processing and is dominated by asynchronous data flow operations. Initial engineering samples of the Virtex-4 LX Platform FPGAs will be available in summer 2004, with SX and FX platforms to follow. This approach provides system designers with flexibility, price, performance and time-to-market benefits.
Xilinx changed its definition of ASMBL from Application Specific Modular Block to Advanced Silicon Modular Block to make it clear that they intended to pursue its standard products path with domain-optimized devices, rather than 'Application Specific' devices such as ASSPs and ASICs.
Common to all the Virtex-4 Platform FPGAs is the traditional highly flexible “programmable logic” with its programmable interconnect and I/O structures. Other enhanced features in the Virtex-4 family included new Digital Clock Management, faster block RAM, enhanced PowerPC 405 core with an Auxiliary Processor Unit for direct interface between CPU and fabric, 1Gbps parallel I/O, 0.6 - 11.1 Gbps serial transceivers and an enhanced XtremeDSP slice with built in MAC functionality.