Oasis
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Oasis

Introduction

On July 12, 2005 Synopsys announced that its Galaxy Design Platform and Design For Manufacturing tool suite support the entire Open Artwork System Interchange Standard (OASIS) file transfer format with all current production releases. All relevant Synopsys software now support the OASIS format for design and production, including; Astro, IC Compiler, CATS, Hercules, Proteus, SiVL and Star-RCXT software products. These products provide the full benefit of OASIS' file compression capability and support the entire specification including the ability to process CBLOCK records which embed compressed data for additional compactness. Synopsys was an early participant in the Semiconductor Equipment and Materials International Data Path Task Force Working Group (SEMI DPTF-WG) that defined the new format.

This follows the announcement last September by Mentor Graphics that its Calibre product line is accepting OASIS files and supporting OASIS output in the upcoming 2004.3 production release scheduled for September 2004. It includes the GDS-to-OASIS translator, which in June 2004 was made publicly and freely available for validation and verification of the new format via a download from the corporate website.

In November 2004 SoftJin, an Indian EDA company, released a free suite of IC design layout data exchange libraries and tools for use by IC designers and EDA product companies. This included GDSII and OASIS readers, writers and GDSII-to-OASIS translator, in source code form. The software suite was named Anuvad which means translation in the Sanskrit language.

At that time Mr Nachiket Urdhwareshe, CEO of Softjin, said "SoftJin has been providing customized EDA tool development services to semiconductor and EDA companies across the design flow, including post layout Mask data preparation tools. The Anuvad suite's release shall complement SoftJin's customized EDA software development service offerings in the physical design automation, post-layout data processing and mask data preparation domain. Specifically, our aim is to be the leading player in providing customized post-layout tools as well as point tools based on OASIS. We have the capability to develop the tools that use the native features of OASIS format, thus extracting the maximum data size reduction, efficient data handling and other benefits enabled by the OASIS format."

SoftJin is an EDA software development services company founded in 2000 and headquartered in Bangalore that develops EDA tools for the specific requirements of semiconductor and EDA companies.

In January 2005 MicroEDA announced the launching of GDS Tools to offer IC viewers, tools and translators for the EDA industry. All products are purchased over the Internet via the GDSTools.com website. CoolView is a viewing and navigation system for GDS-II, LEZF, DEF, OpenAccess, Oasis and other formats priced at $295. QuickTrans is a GDS II, OPenAccess, Oasis, DXF and Gerber Multidirectional translator. Each translator is priced at $195 or all can be purchased for $495.



What is Oasis (Open Artwork System Interchange Standard)?

The situation in 2001 as described by SEMI was that “GDS II, the predecessor to Oasis, had been the de facto standard for layout interchange for more than two decades. The old format, limited by 16-bit and 32-bit internal integer fields, by its inefficient representation of cell-native geometric figures, and by high structural overhead, was becoming difficult to use for leading-edge designs, and file sizes were becoming unwieldy, in some cases growing to many tens of gigabytes.”

The goals set out for the Oasis were to:
- Achieve at least an order-of-magnitude file size improvement compared to GDSII Stream.
- Remove all 16-bit and 32-bit integer width restrictions; make the new format fully 64-bit capable.
- Efficiently represent cells with large payloads of flat native geometric figures.
- Provide a richer information palette to facilitate interchange of layout-related information between design and manufacturing.
In a paper entitled “OASIS - based data preparation flows: Progress report on containing data size explosion” by Steffen Schultz and Pat Lacour, both from Mentor Graphics, the authors published the results of 11 tests cases in GDS II and Oasis formats. According to the paper “Experimental data gathered based on an implementation of OASIS v. 1.0 shows that the target of a 10x average file size reduction for design data has been achieved and is exceeded in many cases for both design data and data post the application of the optical proximity correction.”

Oasis 1.0 was approved by SEMI in July 2003. The specification was made available via download in September 2003.

The driving force behind Oasis was Tom Grebinski. He was an unlikely candidate for this role in that his background was chemistry not electronics. He talked with various semiconductor industry executives about whether GDS II would limit their capabilities to move forward. The answer was a resounding yes. He decided to do something about the situation. He brought together some industry luminaries like Roger Sturgeon, the creator of GDS II, to support him in leading an effort to change GDS II to a new more efficient and richer format. With their help he got a number of technical people involved, put out a press releases announcing the effort and set out to sell the idea of changing form GDS II to Oasis. He became the chairman of the Semiconductor Equipment and Materials International Data Path Task Force Working Group (SEMI DPTF WG).

At time he began this effort Grebinski was in charge of strategic partnerships and alliances for Micronic Laser Systems, a Swedish firm. They funded his effort and along with SEMI the meetings themselves. Participants in the group had to be involved not just show up at meetings. Intel and others formally assigned people to the project and funded their effort and travel. Micronic owned 95% of the mask pattern generation market for flat panel displays. Their internal formats were very close to the GDS II format. Micronic had decided to move into the semiconductor market. They wanted GDS II to be more of a de facto standard in the mask shop than Mebus or VSB11 format because when they received data in other formats they had to reverse engineer it, back it out and bring it into their GDS II-like format. This was problematic and costly. So they saw Oasis as a possible solution to that problem.

This turned out to be a two year effort. IBM, AMD and others developed their own translators and ran the test suites to measure how efficient the specification was at a given point in time.

Grebinski says that the consensus is that Oasis has so many capabilities it will take another five years to exploit them all. He thinks that 99% of current implementation have yet to exploit most of the features. Other capabilities within Oasis for the expression of data will give efficiencies in terms of optimality. Consequently, one can expect even greater bit efficiencies over time until one reaches the point of diminishing return. According to Tom Oasis was difficult to do, so he doesn't envision anyone trying something else for some time.

An example of an advanced capability is partial and selective encryption. This allows the user to encrypt all but the cells and layers they want a third party to access. Such an encrypted file remains compliant and thus can be read by any OASIS reader. Furthermore, such an encrypted file can maintain an ability to be modeled relative to the rest of the encrypted design.

In August 2004 Grebinski formed his own company Oasis Tooling. Oasis Tooling has built a set of verification and acceptance tools and utilities for OASIS. These tools are extensible and portable enough that they can be used by any company who has their own internal databases and CAD tools. They can be used by the same companies to verify quality and optimality of an OASIS implementation offered by a commercial EDA company or one offered by makers of OASIS ready mask pattern generators.

Oasis Tooling has regression test cases which test whether an OASIS reader is compliant with the OASIS specification. The test cases at are at increasing levels (one-fault, two-fault, combinatorial, etc.) of complexity. There are test cases for readers which read native OASIS, post-OPC OASIS and OASIS VSB data files.

The company also has writer optimality test cases and pattern recognition profilers which gauge the efficiency of the writer as well as the quality of the writer pattern recognition algorithms and methods.

The firm offers the tools listed below for scratch implementation of OASIS, migrations from GDSII to OASIS or adding stream in/out for OASIS from an internal or commercial CAD tool or database.
GDSII to Oasis translators
OASIS to GDSII translators
Text to Oasis
OASIS to Text
OASIS to OpenAccess to OASIS translators
OASSI to text dumper
Native OASSI strict-mode to non-strict-mode converter
Native OASSI viewers 2-D and 3-D.
Oasis Tooling is just now entering the revenue stage. Grebinski hopes for volume sales related to regression testing.



Ray Bingham

On July 11 Cadence Design Systems announced that Ray Bingham would retire from the company as of July 31, 2005, and is stepping down as executive chairman and as a member of the Cadence Board of Directors. Bingham has served as executive chairman of Cadence since May 2004, after serving as president and chief executive officer since 1999 and as executive vice president and chief financial officer since 1993.

Dr. John B. Shoven has been elected chairman of the Board of Directors. Dr. Shoven is the Charles R. Schwab Professor of Economics at Stanford University, and the director of the Stanford Institute for Economics Policy Research. Dr. Shoven, a member of the Cadence Board of Directors since 1992, has been serving as the board's lead director and is currently chairman of the Corporate Governance and Nominating Committee and a member of the Audit Committee.

Michael Fister had taken over as President and CEO as of May 2004. Mr. Fister was most recently senior vice president at Intel Corporation and general manager of the Enterprise Platforms Group.

This announcement caused me to look up Ray's biography. Unlike his predecessor Jack Harding who had been CEO at Cooper & Chyan Technology (CCT) and at Zycad Coporation, Ray's career before Cadence was outside the EDA and semiconductor industries. This caused some hand wringing at the time. He had served as Executive Vice President and Chief Financial Officer for eight years at Red Lion Hotels. As head of Corporate Business Development, Bingham had been responsible for the acquisition and development of more than 20 additional hotels to the chain. Prior to Red Lion, Bingham was based in The Hague, Netherlands, where he was Managing Director of Agrico Overseas Investment Company (AOIC), a subsidiary of Williams Companies, Inc. At AOIC, he was responsible for developing and managing a substantial portfolio of international joint venture investments in chemical manufacturing. Bingham also had additional experience from the Marriott Corporation, where he served as Assistant Treasurer and Vice President, Project Finance.

During Ray's tenure Cadence from a $369 million supplier of electronic design automation tools to $1.1 billion electronic design industry leader in 2003. Ray was particularly good at establishing global strategic partnerships with companies such as IBM, Agilent, Hewlett-Packard, and Fujitsu.



Sassar Worm Trial

In a May editorial I wrote about computer viruses. Sven Jaschan, the teenager who created the Sassar computer worm, was convicted in Verden, Germany in early July. His charges included computer sabotage. He was given a suspended sentence of one year and nine months. He had confessed to police and at the time of his arrest in May 2004. The youth said that his original intentions was to create a virus, "Netsky A," that would combat the "Mydoom" and "Bagle" viruses, removing them from infected computers. That led him to develop the Netsky virus further -- and to modify it to create Sasser. Unlike many other viruses, Sasser made its way from computer to computer without help from users. It got into Windows computers by exploiting a programming bug in the operating system. Although Microsoft had released a patch for this loophole on 13 and 28 April 2004, many companies had not applied this protection before Sasser struck.

Jaschan was caught as a result of tip from a person seeking the $250,000 reward Microsoft had posted. He was arrested just days before his eighteenth birthday. As a result he was tried as a juvenile. It is hard imagine a non-violent crime that caused more damage than his computer viruses. The lenient sentence combined with worldwide notoriety and the admiration of the hacker community does not seem to adequately punish nor act as a deterrent to future instances.



The top five articles over the last two weeks as determined by the number of readers were

Cadence Completes Leadership Transition; Ray Bingham Retires as Executive Chairman (see editorial above)

EDA Industry Reports Flat Revenue in 1st Quarter of 2005 The EDA Consortium's Market Statistics Service (MSS) announced that the EDA industry revenue for Q1 of 2005 was $989 million, versus $995 million in Q1 2004. Total product revenues, without services, were $912 million in Q1 of 2005 vs. $918 million in the same quarter of 2004.

Synopsys Announces Production Support for New Oasis File Transfer Format (see editorial above)

Cadence Announces Second Quarter 2005 Financial Results Webcast webcast will begin Wednesday, July 27, 2005 at 2 p.m. (Pacific)/5 p.m. (Eastern).

Apache Achieves Record Breaking Q2 Sales and Apache Design Solutions Adds EDA Veteran Dian Yang to Executive Team Physical power integrity solutions vendor Apache reports that seven of the top 10 semiconductor companies worldwide have now adopted the RedHawk dynamic power signoff solution.



Other EDA News

Mentor Graphics Receives Industry Certification of ULPI Support for USB On-The-Go IP Core

Adoption of Cadence Encounter RTL Compiler Accelerates in Japan; Cadence Global Synthesis Gets Support from ASIC Customer and Leading ASIC Vendors for Enabling Quality of Silicon (QoS)

U.S. Leads in Electronic Design...But For How Long? (EDN Magazine)

SMIC and Synopsys Announce Reference Design Flow 2.0

SynTest Previews UltraScan To Reduce Cost of Testing For Nanometer Technology ASICs

Sandwork Design Chosen by Faraday to Debug Analog and Mixed-Signal Chip Designs

Giga Scale IC Announces Widespread Adoption of InCyte Chip Estimation Software

Accelerated Technology's Nucleus EDGE Embedded Development Environment Supports MIPS Architecture IBSystems July 15th iPod mini Sweepstakes Winner Announced

Apache Design Solutions Adds EDA Veteran Dian Yang to Executive Team

Apache Achieves Record Breaking Q2 Sales

Fujitsu Ten Adopt Celoxica ESL Tools for Automotive Electronics Design; Market Leading C-Based Design and Synthesis Tools Coupled with Model Based Design Accelerates the Design and Performance of Advanced Automotive Electronics

Credence and Cadence Collaboration Validates Flow for Faster Yield Diagnostics

Dataram Announces 16GB Memory Upgrades for HP 9000 rp3400 and rp4400 Series Servers

AWR Opens Access to Proprietary Xmodels for Third Party EM Analysis Software; Sonnet Software the First to Take Advantage of AWR Open Environment and Easy Integration

Other IP & SoC News

QLogic Reports First Quarter Results for Fiscal Year 2006; Record Revenue Levels Achieved for Third Straight Quarter

Cirrus Logic Reports First Quarter Financial Results for Fiscal Year 2006

Entropic Communications Appoints New Vice President of Engineering; Semiconductor Industry Veteran Andre Chartrand Joins Entropic Management Team

TransDimension Achieves ULPI Controller IP Certification at Industry's First High-Speed OTG Compliance Workshop; Certification Ensures Lower Risk for Customers Integrating High-Speed USB into System-on-Chip Solutions

Marvell Introduces World's First Ultra Low-Power 90nm WLAN Single Chip Solution

ARC International and Express Logic Team to Bring ThreadX RTOS to ARC(TM) 700 Family of Configurable Processors; Leading Royalty-Free RTOS Now Available to Developers Of ARC-Based(TM) Embedded Products

New Power Management ICs from Microchip Technology Combine Discrete Functions into Low-Power Single-Chip Solutions

CEVA Inc. Reports Second Quarter 2005 Financial Results

DSP Group, Inc. Reports Second Quarter 2005 Earnings

Dialog Semiconductor Reports Second Quarter 2005 Results and Announces New CEO

North American Semiconductor Equipment Industry Posts June 2005 Book-to-Bill Ratio of 0.93

Teradyne Announces Second Quarter Results

TranSwitch Corporation Announces Second Quarter Results

Freescale Semiconductor Reports Second Quarter 2005 Results

Intel Posts Record Second-Quarter Revenue of $9.2 Billion; Earnings Per Share 33 Cents

Intersil's New Programmable Display Buffer Widens Viewing Area in Samsung's Advanced TFT-LCD Televisions

Skyworks Delivers Highly Integrated Front-End Module for Broadcom's 54g(TM) Chip Set

Falanx Microsystems Announces Video-Optimized IP Cores for Handheld Semiconductor Design

Agilent Technologies Announces Industry's Thinnest Top-Firing Tricolor LED; 0.35 mm-Thick Device Enables Backlighting for Ultra-Thin, Feature-Rich Mobile Phones and PDAs

Pericom Semiconductor Delivers Innovative Voltage Level Shifter Family with Automatic Direction Sensor

Semtech's Software-Controlled Power Management IC Combines Five Programmable Regulators in One Small Package; Well Suited for Low-Power Portable Applications, the Highly Integrated SC900 Reduces Parts Inventory Conserving Board Space and Design Time

New High-Density SPI(TM) Serial EEPROMs Backed by Microchip Technology's Commitment to Reliability, Consistent On-Time Delivery

Arm Holdings Plc Announces Results For The Second Quarter And Six Months Ended 30 June 2005

Micron Technology, Inc., First to Provide Server Customer with 2 Gigabit Sample Components; Micron Continues Commitment to Growing Server Market

AmberWave Files Patent Infringement Suits against Intel

Vitesse Breaks the Switch Integration Barrier; Delivers World's Only Integrated 16- and 24-port Gigabit Ethernet Switch System-on-a-Chip with PHYs

Cirrus Logic Charges Into Low-Power Digital Audio Applications With Highly Integrated Mixed-Signal Codec IC; CS42L51 Delivers Superior Audio Output Performance at Low-Power 1.8 V Power Supply

Dual SATA Bridge Chip from Oxford Semiconductor Brings Fully Portable Data Storage

Altera Offers Faster Speed Grade for High-Density Stratix II FPGAs

Actel Introduces Fusion Technology and Ushers in Era of the Programmable System Chip

Atmel Introduces a Ready-to-Use Ultra-Low-Power MP3 Decoder for Mobile Phones

TI Introduces 13-Bit, 210MSPS ADC with Superior Dynamic Performance for Wideband Applications

STMicroelectronics Unveils First in Family of Configurable System-on-Chip ICs


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--Contributing Editors can be reached by clicking here.

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