Virtex-5 FXT FPGAs Added to PCI-SIG's Integrator's List as Part of Broad Solution from Xilinx Including IP, Reference Designs, Development Platforms and Characterization Reports
With built-in 6.5Gbps Rocket IO(TM) GTX transceiver technology, Virtex-5 FXT FPGAs are ideally suited to support the PCIe 2.0 specification, which doubles the interconnect bit rate over the previous version from 2.5Gbps to 5Gbps to support leading-edge high-bandwidth applications. The recently announced Virtex-5 TXT FPGA platform, which has up to 48 RocketIO GTX transceivers, also supports the PCIe 2.0 standard. Drawing less than 150mW typical, per transceiver at 5Gbps, the RocketIO GTX transceivers enable designers to realize high-speed PCIe 2.0 performance on an FPGA with minimal power consumption.
To see a Tech-on-Line webcast on how to implement PCI Express version 2.0 compliant designs with Virtex-5 FPGAs, please visit: http://www.techonline.com/learning/webinar/211800334.
Xilinx teamed up with key alliance members to provide a comprehensive suite of design resources, including IP cores, for PCIe 2.0 multilane (x1, x2, x4, x8) support, hardware development platforms, and reference designs. These complementary offerings provide a complete, scalable and flexible solution to quickly develop systems with higher performing interconnect at lower cost to deliver first-time design success.
"The PCIe 2.0 standard offers the highest bandwidth and most power optimized version of the standard to date and is critical for high-end applications in the telecommunications and server markets where our Virtex-5 devices are widely used," said Mustafa Veziroglu, vice president of Product Solutions Management at Xilinx. "Our long track record of supporting PCIe, and our own product strategy that includes mapping to the standard's capabilities, enables us to offer designers a proven pathway to implement each new version of PCIe standard."
Broad Range of Support
Xilinx Alliance Program members GDA, Northwest Logic and PLDA provide IP cores to enable PCI Express solutions on Xilinx Virtex-5 FXT FPGA devices. The Xilinx Virtex-5 FXT is the first FPGA platform to provide PCIe 2.0 x8 support. IP Cores from all three of these alliance members have passed the PCI Express version 2.0 compliance testing. In addition, Northwest Logic provides DMA back-end core, combining with their x8 PCIe 2.0 core to support high-performance, on-demand, multi-DMA engine operation with 3,000 Mbytes/s Card-to-System and 2,600 Mbytes/s System-to-Card throughput on Intel DX58SO platform. The Virtex-5 FXT and the newly introduced TXT silicon platforms contain the same high-performance GTX transceivers; additionally all IP and reference designs for PCIe 2.0 available for the Virtex-5 FXT platform can be easily ported to the Virtex-5 TXT platform.
The GTX serial transceivers available on both the Virtex-5 FXT and TXT FPGA platforms have been fully characterized across process, voltage and temperature (PVT), and the complete report is available for download at www.xilinx.com/support/documentation/virtex-characterization_reports.htm.
For more information on the Xilinx PCI Express solutions, go to: http://www.xilinx.com/pcie.
About the Virtex-5 FXT and TXT Platforms
The Virtex-5 FXT FPGA platform is optimized for high-performance embedded processing, digital signal processing (DSP) and high-speed serial connectivity to offer the ultimate in system integration. The Virtex-5 FXT platform includes the first FPGAs to feature industry-standard PowerPC(R) 440 processor blocks. It also includes up to 24 high performance GTX transceivers capable of 6.5Gbps performance and DSP48E slices that deliver more than 190 GMAC's of performance. The Virtex-5 TXT FPGA platform is the fifth addition Virtex-5 FPGA family and delivers twice as many 6.5Gbps GTX transceivers as the Virtex-5 FXT FPGA platform to enable 40G and 100G system in networking, telecom, audio/video broadcast and medical imaging by providing a single-chip solution for applications such as 100GbE MAC-to-Interlaken bridging.
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