Industry Leaders to Chart the Future of Electronics Design and Development at 2006 Electronic Product Miniaturization Symposium

Motorola, Hewlett-Packard, Intel, Samsung, Cadence, Tessera and Others to Tackle the Industry's Most Pressing Challenges

SAN JOSE, Calif.—(BUSINESS WIRE)—June 7, 2006— Tessera Technologies, Inc. (Nasdaq: TSRA), a leading provider of miniaturization technologies for the electronics industry, today outlined the agenda of its fourth annual U.S. Technology Symposium. The half-day event will be held at The Argent Hotel in San Francisco, California and will take place on Monday, July 10th, the day before the opening of SEMICON West 2006. Companies from across the semiconductor supply chain will be represented, providing a comprehensive view of the technologies and trends that are driving the future of electronics miniaturization and performance.

Dr. David Tuckerman, Tessera's chief technical officer, will explore the 3rd dimension in electronics design during his opening comments. The following industry experts join Tuckerman on the program:

-- Motorola: Vahid Goudarzi, distinguished member, technical staff, will examine the challenges and solutions for miniaturization of fully integrated wireless systems.

-- Hewlett-Packard: Walter Fry, distinguished technologist and notebook platform architect, will discuss the trends, technologies and challenges for notebook computers.

-- Intel: Dr. John Heck, research scientist, will discuss MEMS devices, specifically the past, present, and future of miniature silicon-based machines.

-- Samsung: Joe Virginia, vice president of Samsung's LCD business, will discuss mobilizing LCD technology.

-- Cadence: Felicia James, vice president and general manager of Cadence Kits R&D, will explore accelerating the application of EDA technologies for complex designs.

-- Prismark Partners: Mark Christensen, principal consultant, will discuss SoC and SiP technologies, key enablers for continuing miniaturization of portable products.

-- Tessera: Dr. Giles Humpston, director, research and development, will explore wafer level technologies for optical devices in portable electronics.

Tessera, EETimes, Chip Scale Review and Semiconductor Manufacturing Magazine have teamed to sponsor the Symposium. The half-day event will run from 1:00-5:30 p.m., followed by a reception from 5:30-7:00 p.m. As space will be limited, pre-registration is requested. The registration fee is $60.00. Attendees can register at www.tessera.com. For additional information, contact Daryl Larsen, symposium event manager, at +1-408-952-4364 or dlarsen@tessera.com.

About Tessera Technologies, Inc.

Tessera Technologies is a leading provider of miniaturization technologies for the electronics industry. Tessera enables new levels of miniaturization and performance by applying its unique expertise in the electrical, thermal and mechanical properties of materials and interconnect. As a result, Tessera's technologies are widely adopted in high-growth markets including consumer, computing, communications, medical and defense. Tessera's customers include the world's top semiconductor companies such as Intel, Samsung, Renesas, Toshiba and Texas Instruments. The company's stock is traded on the Nasdaq National Market under the symbol TSRA. Tessera is headquartered in San Jose, California. www.tessera.com.

Safe Harbor Statement

This press release contains forward-looking statements, which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements involve risks and uncertainties that could cause actual results to differ significantly from those projected. Factors that might cause or contribute to such differences include, but are not limited to, fluctuations in Tessera's operating results due to the timing of new license agreements and royalties, Tessera's ability to protect its intellectual property and the risk of a decline in demand for semiconductor products. You are cautioned not to place undue reliance on the forward-looking statements, which speak only as of the date of this release. Tessera's filings with the Securities and Exchange Commission, including its Annual Report on Form 10-K for the year ended December 31, 2005 include more information about factors that could affect the company's financial results.

Note: Tessera and the Tessera logo are registered trademarks of Tessera, Inc. All other company, brand and product names may be trademarks or registered trademarks of their respective companies.



Contact:
Tessera
Joyce Smaragdis, 408-952-4317

Email Contact
or
Porter Novelli
Ricky Gradwohl, 408-369-4600 ext. 631

Email Contact



Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs


Featured Video
Editorial
Peggy AycinenaIP Showcase
by Peggy Aycinena
Grant Pierce: Grand Challenges in IP
More Editorial  
Jobs
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
Technical Support Engineer for EDA Careers at Freemont, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
Upcoming Events
Automotive E/E Architecture China Conference at Shanghai China - May 25 - 26, 2017
EMC PCB Design Integration at 13727 460 Ct SE North Bend WA - Jun 6 - 9, 2017
DAC 2017 Conference at Austin TX - Jun 18 - 22, 2017
2017 FLEX Conference at Monterey Conference Center 1 Portola Plaza, Monterey CA - Jun 19 - 22, 2017
ClioSoft
DAC2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy