Leading Digital Core Combined With High-performance PHY Lowers Risk for SoC Designers
The DesignWare PHY for the PCI Express interface integrates high-speed, mixed-signal custom CMOS circuitry that is fully compliant with the PCI Express 1.1 specification and the PIPE interface standard. While low in power consumption and silicon area, the DesignWare PHY substantially exceeds the electrical specifications in such key performance areas as jitter margin and receive sensitivity. The family of PCI Express digital cores from Synopsys is designed with a high-performance, pipelined architecture for maximum sustainable throughput while achieving low latency and a low gate count. Using the Synopsys PHY and digital controller cores together greatly reduces the risk of interoperability failure between the complex digital protocol layers and high-speed analog interfaces.
"As the leading provider of PCI Express IP, we have taken an active role in lowering the total cost of ownership for our customers using this faster protocol," said Guri Stark, vice president of Marketing in Synopsys' Solutions Group. "Our customers depend on us to save them money when they deploy PCI Express technology because they get a solution that is verified to their application and hardened with substantially less Link-PHY integration risk."
DesignWare digital cores for the PCI Express interface, including endpoint, root complex, dual mode and switch/bridge, as well as the DesignWare PHY IP are currently available. DesignWare verification IP for the PCI Express interface is available today for no additional charge to current DesignWare Library and DesignWare Verification Library licensees.
About DesignWare Cores
Synopsys DesignWare Cores provide system designers with silicon-proven, digital and mixed-signal connectivity IP for some of the world's most recognized products, including communications processors, routers, switches, game consoles, digital cameras, computers and computer peripherals. The DesignWare Cores family includes industry-leading connectivity IP such as USB 1.1, 2.0, OTG and USB PHYs, PCI, PCI-X(R), PCI Express(TM), PCI Express PHY, SATA, IEEE 1394 and Ethernet standards. Provided as synthesizable RTL source code or in GDS format, these cores enable designers to create innovative, cost-effective systems-on-chip and embedded systems. Synopsys provides flexible licensing options for the DesignWare Cores. Each core can be licensed individually, on a fee-per-project basis or users can opt for the Volume Purchase Agreement, which enables them to license all the cores under one simple agreement.
For a complete directory of Synopsys IP visit: http://www.synopsys.com/ipdirectory
For more information on DesignWare IP, visit: http://www.designware.com/ or call 1-877-4BEST-IP
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http:/www.synopsys.com .
NOTE: Synopsys and DesignWare are registered trademarks of Synopsys, Inc. PCI, PCI-X and PCI Express are registered trademarks of PCI-SIG. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Web site: http://www.synopsys.com/
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