Imperas Exhibits Solutions Supporting Software Debug and Test for the ARM-Based Embedded Systems
OXFORD, England — (BUSINESS WIRE) — September 27, 2016 — Imperas Software Ltd., the leader in high-performance software simulation and virtual platforms, today announced that they will exhibit and deliver a technical paper at the 2016 ARM TechCon. Imperas invites attendees to register for a demonstration of Imperas embedded software development, debug and test solutions for ARM-based systems.
- Solutions: Imperas will demonstrate solutions for custom/proprietary processor modeling, early software development and more comprehensive software testing. Use cases include porting and bring up of hypervisors and operating systems, advanced software analysis such as code coverage, profiling and memory monitoring, and support for advanced methodologies such as Continuous Integration (CI).
- Specific demos will include Linux booting on various Cortex-A platforms, RTOS booting on Cortex-M platforms, and the Imperas verification, analysis and profiling (VAP) tools, including the OS-aware tools and advanced tools such as fault simulation.
- Models and architectures: Open Virtual Platforms (OVP) models and platforms cover the full line of ARM processors, including Cortex-A, R and M families, ARM big.LITTLE architecture and multi-cluster ARMv8 architectures.
- Integrating Power Models into Instruction Accurate Virtual Platforms for ARM-based MPSoCs by Imperas and OFFIS. Abstract: In embedded systems, extra-functional requirements like power consumption have been increasing in importance. This work focuses on a power extension of an instruction accurate virtual platform. As a proof of concept, we equip an Open Virtual Platforms (OVP) Xilinx Zynq virtual platform with a dynamic voltage and frequency scaling (DVFS) compatible power model. Software on the virtual platform can access the actual power consumption and perform power management through DVFS. The presentation will include a demonstration of each contribution. All demonstrators and models will be made publicly available for extensions and application in different ARM based platforms.
- SELTECH, a Japan-based developer of hypervisors, will be in the Imperas booth for one hour both days of the exhibit discussing and demonstrating their hypervisor-based solutions for safety and security critical embedded systems.
When: Conference: October 25-27, 2016, starting at 8:30AM. Expo: October 26 and 27, 2016, 10:30 AM – 6:30 PM
Where: Santa Clara Convention Center, Santa Clara, CA. Imperas is in booth #520 in the exhibition area.
For more information, or to set up meetings with Imperas at DAC, please email firstname.lastname@example.org.
ARM TechCon 2016 provides high level keynotes, detailed technical presentations and ARM ecosystem exhibits, all aimed at advancing the industry discussions of state of the art solutions to embedded systems issues.
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Larry Lapides, 925-519-1234