StarCore Delivers a New Architecture With Improved Multimedia Performance and System Features
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StarCore Delivers a New Architecture With Improved Multimedia Performance and System Features

Multimedia-Optimized Processor Cores and Subsystems Target Advanced Wireless and Consumer Applications

AUSTIN, Texas—(BUSINESS WIRE)—Sept. 27, 2004— StarCore, the world's fastest-growing provider of licensable processor core technologies, announced today the availability of the new StarCore(TM) SC2200 and SC2400 synthesizable digital signal processor (DSP) cores. The cores, based on the StarCore V4 architecture announced earlier this year, are optimized for multimedia, communications, and consumer applications. Both of these SC2000-family processor cores can be licensed as part of subsystems that integrate the core with system intellectual property (IP) blocks such as memory interfaces, cache controllers, a memory protection unit, and an AHB-compliant system bus interface.

The SC2000 features new instructions that accelerate video coding (such as H.264 and MPEG-4) and reduce code size. For example, the architectural efficiency of the SC2400 allows it to decode MPEG-4 video, while requiring one third fewer cycles than the StarCore SC1400 core. The improvement is even more relevant during video encoding, which the SC2400 can perform in only half the cycles required by the SC1400 when encoding for the H.264 standard, which results in higher performance and lower power consumption.

New user and privileged modes and a memory protection unit enable easier porting of real-time operating systems and the convergence of several embedded applications on a single StarCore processor core. System developers will be able to take advantage of this feature to reduce the number of cores in a device, thus reducing cost, power consumption, and design complexity. And because StarCore technology offers backward binary code compatibility across all product families, programmers and engineering managers can move swiftly to market without the recoding effort that is required with other processors.

Market Opportunities

The SC2200 and SC2400 cores are scalable and synthesizable, making them ideal for a broad spectrum of applications, including:

-- Wireless products with converging communication and multimedia features, such as smart phones, mobile digital TV, and connected personal entertainment devices

-- Consumer multimedia devices, such as digital still cameras and solid-state camcorders

-- Consumer communication applications and products, such as voice over IP (VoIP) and web tablets

"The enhanced instruction set is designed to closely couple the architecture and compiler, enabling higher code density and even better performance. This makes the new StarCore architecture a better compiler target for Green Hills Software's MULTI(R) development environment," stated Dan O'Dowd, founder and chief executive officer of Green Hills Software.

"As a leading provider of multimedia solutions on DSP chips and core platforms, we consider the enhanced performance and instruction set of the SC2000 as the key enabler for real-time software implementation of MPEG-4, H.264, and WMV9 algorithms in embedded applications," says Ravishankar Ganesan, vice president of Multimedia Business at Ittiam Systems.

"The innovative StarCore design, with its own memory protection interface, user and supervisor mode, and dedicated memory protection unit, when coupled with a multitasking RTOS such as RTXC Quadros, gives developers greater freedom to design new converging applications on a single processor core while protecting critical code and data from being corrupted," stated Bill Dittmann, chief engineer at Quadros Systems, Inc.


The licensable SC2200 and SC2400 processor cores are available immediately in synthesizable Verilog RTL in the following subsystem configurations, which provide a range of performance and price options:

-- SP2201 and SP2401 subsystems: For embedded applications, featuring enhanced multimedia performance with on-chip emulation, memory interfaces, DMA interface, AHB-compliant system bus interface, clock control unit, and interrupt control unit.

-- SP2202 and SP2402 subsystems: For advanced applications, including all the features of the SP2201 and SP2401 subsystems, plus data and program cache controllers, a memory protection unit, and a high-speed interface to connect application-specific accelerators.

"Our product line was conceived with modularity and flexibility in mind," said Alex Bedarida, vice president of marketing and sales at StarCore. "The same Verilog RTL code can be easily synthesized for integration into both low-power devices for mobile phones and high-performance devices for consumer multimedia products. Depending on the parameters chosen by the designer, the SC2200 can run at over 280 MHz in a low-power silicon process (90 nm WC process, 1.08 V, 110 degrees C). For higher performance devices, the SC2400 can run faster than 450 MHz when implemented in a high-performance process (90 nm WC process, 1.08 V, 110 degrees C)."

About StarCore

Based in Austin, Texas, StarCore is a leader in the development of high-performance processor architectures, cores, and subsystems for the communications and consumer electronics industries. For more information on StarCore and its intellectual property and services, visit the company's website at

StarCore, Austin
Allen Hyman, 512-682-8558

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