Comcores Announce Availability of CPRI v7.0
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Comcores Announce Availability of CPRI v7.0

Copenhagen, Denmark, — Denmark Headquartered Comcores ApS, a specialized supplier of silicon intellectual property (SIP) today announced the immediate availability of the Common Public Radio Interface (CPRI) v7.0 targeting FPGA and ASIC devices.

With an increased line rate up to 24.33 Gbps and improved line coding efficiency, CPRI v7.0 supports an increased RF signal bandwidth of up to 480MHz needed for the proliferation of C-RAN fronthaul networks. The IP includes an efficient implementation of a Reed-Solomon Forward Error Correction option (RS-FEC) that can optionally be used for fault protection at the highest line rates.

Apart from Comcores standard 32-bit implementation a scaled down 64-bit version targeting FPGA’s is offered which enable time closure at the highest rates even in FPGA’s.

The new CPRI v7.0 IP allow developers to implement more efficient digital DAS (Distributed Antenna Systems) and remote radio head solutions. As an example a 2x2 low power radio can be deployed using a 240MHz signal bandwidth per antenna either in contiguous or non-contiguous spectrum applications making it ideal for high performance neutral-host multi-operator and multi-band DAS applications.

“Efficiency, in terms of cost, power and time to market, are paramount to enabling LTE-Advanced and 5G wireless communication systems”, said Thomas Noergaard, Founder at Comcores. “The Comcores CPRI v7.0 IP not only enables next generation radio, but also open up a wide range of optical and outdoor microwave fronthaul system applications”.

About Comcores

Comcores is a leading provider of silicon agnostic IP-cores for wireless communication with a particular focus on front-hauling and cloud-RAN. State of the art know how and practical experience enabling connectivity in wireless systems are key elements in Comcores’s delivery of unique, high quality, production-proven IP-cores. Comcores solutions not only accelerate development and cut costs, they increase overall design reliability and project predictability.

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