HW/SW Co-design made easy: SystemC benchmark suite automatically mapped using High-Level Synthesis from NEC to Terasic Inc. DE1-SoC development kit.

Hong Kong, June 29th -- The Hong Kong Polytechnic University (PolyU) today announced that PolyU, in collaboration with NEC Corporation and Terasic Inc., has release an accelerated version of the Synthesizable SystemC Benchmark suite (S2CBench) previously also developed at PolyU. The AS2CBench benchmarks automatically map the synthesizable SystemC designs of the S2CBench benchmarks using NEC’s High-Level Synthesis tool (CyberWorkBench) onto Terasic’s DE1-SoC Development Kit.

The AS2CBench have been designed to allow anyone interested in HW/SW co-design and High-Level Synthesis to map behavioral descriptions directly onto a configurable programmable device.

The benchmarks’ testbench are directly mapped onto Altera’s Cyclone SoC ARM Cortex-A9, while the synthesizable SystemC description is mapped onto the programmable device using High-Level Synthesis. The result is an accelerated execution of the benchmarks compared to the execution of the same benchmarks on the same embedded processor.

The High-Level Synthesis tool used to synthesize all SystemC benchmarks is NEC’s CyberWorkBench. CyberWorkBench is a C-based electronic circuit design platform developed by NEC over the course of twenty years. CyberWorkBench is developed around the “All-in-C” paradigm that allows high level synthesis and verification of any ANSI-C or SystemC program generating high quality circuits. For more information visit www.cyberworkbench.com.

The target hardware platform is Terasic’s DE1-SoC Development Kit. The DE1-SoC kit presents a robust hardware design platform built around the Altera SoC FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. With this development kit, users can leverage the power of the re-configurability paired with a high-performance, low-power processor system.

The AS2CBench benchmarks are available for download at http://sourceforge.net/projects/as2cbench/ as well as the original S2CBench benchmarks from www.s2cbench.org.

About The Hong Kong Polytechnic University

The Hong Kong Polytechnic University (PolyU) is a university with a proud and illustrious history. Formerly known as the Hong Kong Polytechnic, the Institution assumed full university status in 1994. The University prides itself on its professional education and innovative research as well as close ties with business and industry. It is the largest publicly-funded tertiary institution in Hong Kong in terms of number of students, with over 32,000 full-time and part-time students, and a vast pool of more than 350,000 graduates.  PolyU website: www.polyu.edu.hk.

About NEC Corporation

NEC Corporation is a leader in the integration of IT and network technologies that benefit businesses and people around the world. By providing a combination of products and solutions that cross utilize the company’s experience and global resources, NEC’s advanced technologies meet the complex and ever-changing needs of its customers. NEC brings more than 100 years of expertise in technological innovation to empower people, businesses and society. For more information, visit NEC at www.nec.com.

About Terasic Inc.

Terasic Inc. was founded in early 2000 with the major goal of developing world class FPGA development platforms. Our headquarter office is located in Hsin Chu, Taiwan which is also known as the Silicon Valley of Asia. A branch office is established in Wuhan, China as well. Terasic offers expertise in FPGA/ASIC Design, High Speed Board Design and Layout, Low Cost Board Design, Device Drivers, and all other support Soft wares and Documentations. Our cutting-edge design and manufacturing capabilities provide the state of the art products and exceptional services to our customers.

Press contact:                   
Dr Benjamin Carrion Schafer
Assistant Professor,
Department of Electronic and Information Engineering
Email Contact
(852) 3400 3554



Read the complete story ...


Review Article Be the first to review this article
CST: Webinar September 14, 2017

Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Real Intent: Leveraging on Investments
More Editorial  
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
FPGA Engineer for Teradyne Inc at San Jose, CA
Technical Support Engineer EU/Germany/UK for EDA Careers at N/A, United Kingdom
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Field Application Engineer for Teradyne Inc at San Jose, CA
Analog Hardware Engineer for Teradyne Inc at San Jose, CA
Upcoming Events
CODES+ISSS 2017, Oct 15-20, 2017, Lotte Hotel, Seoul, South Korea at Lotte Hotel Seoul Korea (North) - Oct 15 - 20, 2017
DVCon 2017 Europe, Oct 16 - 17, 2017, Munich, Germany at Holiday Inn Munich City Centre Munich Germany - Oct 16 - 17, 2017
11th International Symposium on Networks-on-Chip (NOCS 2017) at Seoul Korea (South) - Oct 19 - 20, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise