Altera's MAX II Devices Are the Fastest CPLDs Ever

Benchmarks Show Groundbreaking, Low-Cost Architecture Delivers 50 Percent Performance Advantage Over Closest Competitor

SAN JOSE, Calif., April 5 /PRNewswire-FirstCall/ -- Altera Corporation , the CPLD market leader, today released new benchmark information showing that the MAX(R) II device family delivers a 50 percent performance advantage over competing solutions. Based on newly published benchmarks, MAX II devices extend Altera's performance leadership at a time when demand for faster core performance in CPLD designs is increasing dramatically.

"MAX II devices have an inherent performance advantage over macrocell-based CPLDs due to the new register-rich architecture, which includes very short routing paths," said Luanne Schirrmeister, Altera's director of product marketing for MAX products. "The new performance threshold established by the MAX II family benefits digital designers in every segment of the electronics industry by combining an unprecedented low-cost structure with high performance."

A recently released Gartner Dataquest report on user wants and needs in the programmable logic market shows there is increased demand for higher performance in the CPLD market. The research shows that in 2003, nearly 70 percent of CPLD designs required performance greater than 30 MHz, while the number of designs requiring performance greater than 100 MHz experienced the highest growth. With core frequencies at greater than 300 MHz, MAX II devices can easily achieve the performance requirements of the next generation of CPLD applications. For additional information about this report entitled "Technology Road Map to Future ASIC and FPGA Designs: User Wants and Needs," or about Gartner, Inc., please visit http://www.gartner.com/.

Benchmark analysis was performed on Altera's own MAX II CPLD family and the latest CPLD families from both Lattice Semiconductor Corporation and Xilinx, Inc. Utilizing Altera's Quartus(R) II version 4.0 design software, Lattice's ispLEVER version 3.0 design software, and the Xilinx ISE version 6.2 design software, Altera compiled over 100 designs targeting each device family. Using "best-effort" settings, the results of the exercise show that on average, MAX II devices outperform Lattice's ispXPLD devices by 80 percent and Xilinx's CoolRunner II devices by 50 percent.

Details on the exact methods utilized for this analysis, specific recommendations on performing customer benchmarks, and a results summary will be discussed in a net seminar on effective performance comparisons on April 8, 2004; register at http://www.altera.com/education/net_seminars/current/ns_0408.html. Additional information is also available on the Altera web site at http://www.altera.com/.

About Altera

Altera Corporation is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at http://www.altera.com/.

NOTE: Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder.

CONTACT: Anna del Rosario of Altera Corporation, +1-408-544-6397, or Email Contact.

CONTACT: Anna del Rosario of Altera Corporation, +1-408-544-6397, or
Email Contact

Web site: http://www.altera.com/




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