Memoir Systems Participates in TSMC 2013 North American Technology Symposium in San Jose, California

Memoir Systems’ Renaissance™ 2x and Renaissance 4x memory IP now available for TSMC’s Physical Memory Libraries

SAN JOSE, Calif. — (BUSINESS WIRE) — April 2, 2013 — Memoir Systems:

Type:   Industry Conference
 
Date: 9 April, 2013
 
Location: San Jose, CA
 

The TSMC 2013 North American Technology Symposium delivers updates on TSMC’s advanced technologies, advanced back-end capabilities and future plans.

Memoir Systems is participating in the TSMC Symposium for the first time this year. The company will demonstrate how its Renaissance memory IP products can be used in combination with TSMC’s physical memory libraries to create higher performance memories. This demonstration will also highlight the area and power savings that can be achieved for practically any SoC implementation with Memoir’s product solutions.

Based upon the company’s award-winning patented Algorithmic Memory® technology, Renaissance memory IP increases the memory performance of existing embedded memory macros by delivering up to a 4x increase in memory operations per second (MOPS). In addition, it eliminates the need to build custom multiport memories and can reduce area and power requirements by up to 60% compared to conventional physical multiport implementations.

Who should attend?

System architects, engineers, engineering managers and executives who seek more information about the integration of Memoir’s Renaissance memory IP with TSMC libraries are invited to visit Memoir Systems at booth 201.

Questions about this event?

Send email to Kella Knack ( Email Contact)



Contact:

KJ Communications
Kella Knack, 707-568-3502
Email Contact




Review Article Be the first to review this article
Downstream : Solutuions for Post processing PCB Designs

Synopsys: Custom Compiler

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Diversity: Really, who cares
More Editorial  
Jobs
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Senior Methodology Automation Engineer for EDA Careers at San Jose, CA
Proposal Support Coordinator for Keystone Aerial Surveys at Philadelphia, PA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
The Rise of Mechatronics at Dassault Systèmes San Diego 5005 Wateridge Vista Drive San Diego CA - Sep 12, 2017
The Rise of Mechatronics at Buca di Beppo - Pasadena 80 West Green Street Pasadena CA - Sep 13, 2017
DownStream: Solutions for Post Processing PCB Designs
S2C: FPGA Base prototyping- Download white paper
TrueCircuits: UltraPLL



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy