Virage Logic Teams with Chartered and IBM to Provide Highly Differentiated IP Portfolio for Joint 90nm Manufacturing Process Platform
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Virage Logic Teams with Chartered and IBM to Provide Highly Differentiated IP Portfolio for Joint 90nm Manufacturing Process Platform

Virage Logic's Technology-Optimized Platform and ASAP Logic(TM) Will Be Made Available Through Industry's First Cross-Foundry Design Enablement Program

FREMONT, Calif., March 24 /PRNewswire-FirstCall/ -- Virage Logic Corporation , a leading provider of best-in-class semiconductor IP platforms, today announced that Virage Logic's Technology-Optimized Platform -- as well as its Area, Speed and Power (ASAP) Logic Metal Programmable Cell Libraries -- will be made available on the jointly developed Chartered Semiconductor Manufacturing and IBM 90-nanometer (nm) manufacturing process.

System-on-Chip (SoC) designers can now benefit from seamless, easy access to Virage Logic's highly differentiated, silicon-proven intellectual property (IP) as part of the semiconductor industry's first common cross-foundry design enablement program starting at 90nm, announced separately today by IBM and Chartered.

"The unique challenges presented by deep sub-micron technologies like 90nm and beyond call for silicon-proven and highly optimized IP offerings. Virage Logic is a long-standing Chartered partner, and we are pleased to have its Technology-Optimized Platform and ASAP Logic Metal Programmable Cell Libraries available for our joint 90nm manufacturing process platform with IBM," said Kevin Meyer, vice president of worldwide marketing and services at Chartered. "Virage Logic's innovative, quality-focused offering for the joint platform will provide designers the confidence and complete flexibility they need when designing at 90nm."

"We are working closely with Virage Logic to deliver a 90nm library that will allow both IBM and Chartered customers to realize the potential of our advanced CMOS 9SF process while minimizing their costs and risks," said Jim Doyle, vice president, foundry manufacturing services, IBM Systems and Technology Group.

The patented architecture in the Virage Logic ASAP Logic Metal Programmable Cell Libraries provides similar area and performance to commercially available conventional standard cells without the penalty of all-layer mask costs. If a design revision is needed, customers can regenerate only a few metal and via masks, thereby preserving all other masks and saving hundreds of thousands of dollars.

"Our collaboration with IBM and Chartered is strategic to our 90nm platform plans. We are very pleased that our 19 licensed semiconductor IP customers on 90nm now have access to the IBM/Chartered foundry technology," said Jim Ensell, vice president of marketing for Virage Logic. "This collaboration broadens the availability of our silicon-proven, single-source semiconductor IP platform offering and will provide our mutual customers with greater flexibility in manufacturing choices."

About Virage Logic's Technology-Optimized Platforms

Virage Logic's Technology-Optimized Platforms are based on the ASAP Memory(TM) High-Density (HD) memories, the ASAP Logic HD standard cell libraries, and the Base I/O Libraries. These platforms help customers expedite the creation of next-generation SoCs by providing silicon-proven IP optimized for a targeted technology node and process.

Technology-Optimized Platform customers have optional access to Virage Logic's rich portfolio of highly differentiated IP including the STAR Memory System(TM), the ASAP Memory High-Speed (HS) and Ultra-Low-Power (ULP) product lines, the ASAP Logic Ultra-High-Density (UHD) Standard Cell Libraries, the patented ASAP Logic HD and HS Metal Programmable Cell Libraries, and access to specialty I/Os.

About Virage Logic's ASAP Logic Metal Programmable Cell Libraries

The Virage Logic ASAP Logic products contain application-optimized libraries targeted to unique market requirements and are based on Virage Logic's proprietary and patented routing methodology and cell architecture. ASAP Logic Metal Programmable Cell Libraries are used in SoC designs to economically enable functional reprogrammability by changing only a few metal and via masks.


Virage Logic's Technology-Optimized Platform and ASAP Logic Metal Programmable Cell Libraries will be available on the Chartered and IBM joint 90nm manufacturing process platform starting in the second quarter of 2004.

About Virage Logic

Virage Logic Corporation (NASDAQ: VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, and I/Os that are silicon-proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit or call 877-360-6690 toll free or 510-360-8000.


Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (, and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.

NOTE: All trademarks and copyrights are property of their respective owners and are protected therein.

CONTACT: Sabina Burns of Virage Logic Corporation, +1-510-743-8115, or
Email Contact; or Kerry McClenahan of McClenahan Bruer
Communications, +1-503-546-1002, or Email Contact, for Virage Logic

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