Gary Smith EDA Research: DVCon and DATE show reviews; Custom/Analog Design Developments

featured image

DVCon 2011 - Yet another Excellent Conference:

Review of Jim Hogan keynote Navigating the SoC Era where he discussed the reality of the IP Market. Review of Wally Rhines keynote From Volume to Velocity where he discussed the next challenge of verification is to lower the cost of verification in order to increase the number of SoC design starts, particularly from new start-ups.
FREE

featured image

DATE 2011 - DATE Continues to Grow:

Review of Steve Furber Future of Computing keynote where he reviewed the biologically-inspired, massively-parallel architectures of the human brain and growth of conference. Review of Philippe Magarshack's keynote on how Technology R&D brings competitive advantage where he addresses the challenges of being an IDM in a Fab-Lite world; 2 common myths dispelled and growth of conference.
FREE

 

   Recent Research
featured image

Custom/ Analog Design Developments Meeting 65 nm and Below Challenge

Product review of Cadence's enhanced Virtuoso-based product (v6.1). Analysis of custom/ analog flows at lower geometries. Includes table of Top IDMs and Top Fabless companies and their design use at different nodes.
FREE


 


featured image

ASP DAC is Doing Well

ASP DAC continues the trend, started at IC CAD, of being a growing, technically superior and exciting conference. Review of Dr. Takayuki Kawahara's Non Volatile Memory and Dr. Ajoy Bose's Managing Increasing Complexity at Higher Level of Abstraction (ESL) Design keynote
FREE


 


featured image

FPGAs Taking Over the ASIC Market is a Myth

Max, Now you know I believe that most SoC designs will be done in FPGAs and nothing I say here is meant to deny that fact; however your promotion of the myth that FPGAs are driving the ASIC vendors from the battle field is ridiculous.
FREE


 


featured image

Fourth Quarter 2010: Analog/Mixed-Signal Financials & Outlook

Includes market & vendor analysis with quarterly earnings comparison and R&D capacity investment and spending trends.
Purchase $1,000


 


featured image

ESL Behavioral Design

Which engineers use it and the 3 virtual prototypes
FREE




Review Article Be the first to review this article
Aldec

Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Simon Davidmann: A re-energized Imperas Tutorial at DAC
Peggy AycinenaIP Showcase
by Peggy Aycinena
ARM: A Gnawing Sense of Unease
More Editorial  
Jobs
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
LVS for PDK Design Engineer SILICON VALLEY for EDA Careers at San Jose, CA
LVS PEX DESIGN ENGINEERS SILICON VALLEY for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
DVCon India 2017, Sept 14 - 15, 2017 at The Leela Palace Bengalore India - Sep 14 - 15, 2017
SMTA International 2017 at Rosemont IL - Sep 17 - 21, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy