Welcome to the SpringSoft Technology Newsletter. This is a monthly e-mail newsletter distributed to our customers, partners, and friends to provide information on our Novas Verification Enhancement and Laker Custom IC Design technologies. We hope the information in this newsletter will help you to use our products more effectively in your design and verification environments.

Please see the links at the end of this newsletter for subscription information or to provide feedback that will help us improve future editions.

Award-Winning!

Have you heard the news?!?!?

SpringSoft's Laker Custom Layout System has won Best Electronic Design 2010 Award from Electronic Design Magazine

and SpringSoft's Verdi Power-aware Debug Module has won the 2011 DesignVision Award

Verification Enhancement Tips:

Batch Mode Utility to Extract Clock Trees: nClockTree 

The Verdi™ Automated Debug System with the nAnalyzer™ Design Analysis module provides full functions for extracting clock trees and qualifying CTS (Clock Tree Synthesis) settings. However, the clock tree extraction has to be processed in the Verdi system with the nAnalyzer module so the debug time may be occupied especially if the gate level netlist is vast.

To reduce the effort of extracting clock trees every time (especially when there aren’t any changes to the design), the Verdi system provides a batch mode utility nClockTree to do the clock tree extraction in batch mode and save the results in a loadable file.

Click Here

Conditional Alias for Viewing Waveforms

The waveform view (nWave window) in the Verdi™ Automated Debug System provides the capability to attach an alias to the waveform value which gives a better way to visualize the waveform. Now the capability has been further improved for adding conditions, so that the tool can automatically determine which alias table (when there are multiple tables) should be applied based on user-defined conditions.

Click Here

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Custom IC Design Tips

The New Laker ADP Simulation Console

The Laker™ Advanced Design Platform (ADP) unites the full-featured Laker schematic editor, open Simulation Console and LakerWave™ waveform analyzer to create a complete circuit design environment. It works seamlessly with SpringSoft’s award-winning Laker Custom IC Layout system and all of the popular analog simulators to provide a complete solution for the rapid design of your analog, mixed-signal, memory, and custom digital IC designs.

Click Here

News:

Automotive MCU design to benefit from Certitude verification - EETimes Europe

January 11, 2011
By. Colin Holland

SpringSoft Inc.'s  Certitude Functional Qualification System is to be used by Fujitsu Semiconductor Ltd.'s automotive business unit to raise the quality of verification environments and intellectual property (IP) design components required to develop microcontroller solutions for a range of automotive electronics applications.

Click Here

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Current Product Versions:

Certitude 2011.01

Verdi/Siloti 2011.01

Laker 2010.11
Laker ADP 2010.11
Laker Test Chip Development platform (T1): 3.2T1v5p1a

Need to update your version? Go to www.springsoft.com/support

Support Notice:

For Novas products and Certitude products, we plan to drop support for following platforms beginning in 2012.01:

Redhat 3  (RHEL3)
SuSE 9  (SLES9)

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Events:

NextOp, Real Intent and SpringSoft to Unite with Presentations on Functional Verification and Debug at Tokyo University

NextOp, Real Intent and SpringSoft are uniting in an open event at Tokyo University to present on five functional verification and debug topics for high performance electronic design.

The presenters and their topics include:

• Yunshan Zhu, CEO, NextOp Software
  • Assertion Synthesis: Enabling Assertion-Based Verification for Simulation, Formal and Emulation Flows
    
• Pranav Ashar, CTO, Real Intent
  • Chasing X's Between RTL and Gate Level Efficiently
  • What do you need to know for effective CDC verification?
    
    
• Bindesh Patel, Technology Manager, SpringSoft 
  • Getting You Closer to Verification Closure
  • SystemVerilog Testbench - Innovative Efficiencies for Understanding Your Testbench Behavior

When/Where:
Wednesday, February 2, 2011, 10:00 - 20:00
University of Tokyo, Takeda building, 5F Hall

For more information about this open event, please click here.

UVM Enhancements Technical Session @ DVCon

Technical Seminars offered by SpringSoft Experts

• Bindesh Patel
• Rex Chen
• Jun Zhao

Tuesday, March 1, 11AM-12:30PM
Oak Ballroom, DoubleTreen Hotel, San Jose, CA

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SpringSoft Community News!

In the past few months we have added some new features to our website, have you seen them yet?

Video Hints & Tips - Watch quick tips on how to use SpringSoft products more effectively
EDA Blog - Read about and comment on SpringSoft Technology

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We'd appreciate hearing your suggestions, comments or questions about the SpringSoft Newsletter. Please feel free to contact Karim Azar at +1 (408) 467.7860 or Email Contact

Novas, Laker, Verdi, Siloti and nWave are trademarks and Debussy is a registered trademark of SpringSoft, Inc. All other trademarks are property of their respective owners.