Calypto December 2014 Newsletter


Read More

We are pleased to announce the launch of the Catapult 8 platform, a third-generation, high-level synthesis (HLS) technology – the first in the industry.

Catapult 8 Third Generation HLS

The Catapult 8 platform is the result of a significant investment by Calypto to deliver a new generation of HLS technology, while still supporting and enhancing the prior product until customers were ready to transition to the new architecture. In fact, it has been in development for three years, in testing with customers for more than a year, and now widely deployed. Read about why it’s a 3rd generation technology here!

New Synthesizable Library for Catapult

Available with the Catapult 8 platform is the new Catapult Catware library, an extensive source code library of synthesizable functions such as filters and FFTs, provided in SystemC and C++. Continue reading about Catware here!

2014 High Level Synthesis Survey Report

I would also like to update you with our annual HLS Survey Report. As you may know, every year we sponsor 3rd party research that asks engineers worldwide about current challenges. This year we focused on verification challenges and HLS.

Upcoming Events

If you are planning visits to DATE or DVCon, please check out the following information. The DATE paper "Clock Domain Crossing Aware Sequential Clock Gating" is a paper based on the collaboration between Calypto and Samsung. The paper featured at DVCon includes technical information about addressing RTL verification closure with a HLS design methodology.

Mark Milligan
Email Contact
Vice President of Marketing
Calypto Design Systems

Review Article Be the first to review this article

Featured Video
Applications Engineer for intersil at Palm Bay, Florida
Design Verification Engineer for intersil at Morrisville, North Carolina
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, California
Upcoming Events
NVIDIA’s GPU Technology Conference (GTC) at San Jose McEnery Convention Center 150 West San Carlos Street San Jose CA - Mar 26 - 29, 2018
ESC Conference Boston at boston MA - Apr 18 - 19, 2018
IEEE Women in Engineering International Leadership Conference at 150 W San Carlos St San Jose CA - May 21 - 22, 2018
DownStream: Solutions for Post Processing PCB Designs

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise