Eleventh Annual Boston Event is Part of Largest User Conference Program in EDA
MOUNTAIN VIEW, Calif., Oct. 5 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the Best Paper Awards for the eleventh annual Synopsys Users' Group (SNUG(R)) conference in Boston, Mass., held from September 21-22. SNUG conference attendees and the SNUG Technical Committee awarded first place to Garrett Marshall, Jalpa Shah and Scott Stanslaski of Medtronic for "XA Verification in Implantable Medical Design." Second place was awarded to Clifford Cummings of Sunburst Design, Inc. and Heath Chambers of HMC Design Verification, Inc. for "SystemVerilog's Virtual World -- An Introduction to Virtual Classes, Virtual Methods and Virtual Interface Instances." Third place was awarded to Douglas Burns, Barry Katz, Walter Katz, Mike Steinberger and Todd Westerhoff of SiSoft for "Multi-Gigabit Serial Link Analysis Using HSPICE and AMI Models."
Technical Committee Honorable Mentions were awarded to Franklin Bodine, Chris McGlone, and Duane Galbi of Intel Corp. for "Predictable and Repeatable Feedthrough Floorplanning Usinc ICC" and to Premkishore Shivakumar of Intel Corp. for "E to SystemVerilog Conversion." The Best First-time Presenter award went to Pavel Rott of Intel Corp. for "Design Rule Check Classification System with IC Validator," and the Technical Committee Award went to Pete Nixon, Paul Rotker, Matt Cohen, Keith Morse and Bandish Shah of Sun Microsystems for "RTL Structural Analysis Using Design Compiler."
SNUG Boston is part of the largest user conference program in electronic design automation (EDA). Last year, the program attracted more than 6,000 integrated circuit (IC) and system design engineers to open forums in India, Taiwan, Singapore, San Jose, Germany, Israel and Japan. Attendees represent the world's largest semiconductor design and manufacturing companies as well as many innovative start-ups. More than 350 technical users attended this year's Boston event.
"The eleventh annual SNUG Boston didn't disappoint in these tough times, providing engineers with high-quality technical content across a range of topics," said Al Czamara, vice president of hardware engineering, LOA Technology and SNUG Boston technical chair. "Having an opportunity for hundreds of engineers to convene, share ideas and challenges and learn from each other in a technically focused environment helps them to better take on today's challenging electronic product design, verification and manufacturing."
Aart de Geus, chairman and chief executive officer at Synopsys, opened the conference with a keynote sharing his perspective on some important semiconductor trends. He also spoke about a number of Synopsys' exciting technology developments, including StarRC(TM) Custom, a new parasitic extraction solution, IC Compiler's new "In-Design" Rail Analysis and the Lynx Design System, a comprehensive design creation system that allows design teams to streamline their processes.
"Given the outstanding quality of the papers presented at SNUG, I'm not surprised that our users' groups remain so well-attended year after year," said de Geus. "I continue to be impressed at how willing these hard-core designers are to share with each other how they use our tools. Not only are they collaborating with Synopsys on solving some of the toughest design challenges out there, but they're collaborating with each other! Being able to host that experience and recognize the best papers among all the great ones presented this year in Boston is both an honor and immensely satisfying."
SNUG Boston sponsors included: Platinum Sponsors ARM, TSMC and Common Platform (Chartered Semiconductor Manufacturing, IBM and Samsung); and Gold Sponsors Hewlett-Packard and Virage Logic. The two-day SNUG Boston conference featured a technical program with 48 presentations that focused on all areas of design including synthesis, verification, low power design, physical design/sign off, analog/mixed-signal design, custom design, test and rapid prototyping tools. This year's program featured 23 user papers, 23 Synopsys technical tutorials, one workshop and one vision session. These presentations focused on the challenges that engineers face as they design complex systems for a wide array of applications.
Please visit the Synopsys Users Group website at http://www.snug-universal.org/ for more information on upcoming events and how to submit a paper for consideration by the SNUG technical committee. Customers can also access proceedings and the award-winning papers at this link.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, Design Compiler, SNUG and StarRC are registered trademarks or trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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