HDL Design House announces Serial Rapid IO soft IP core(HIP 3300)
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HDL Design House announces Serial Rapid IO soft IP core(HIP 3300)

Belgrade, Serbia — August 18, 2009 — HDL Design House has announced Serial RapidIO soft IP core (HIP 3300) compliant with RapidIO specification version 2.0.1 . HIP 3300 Serial RapidIO endpoint soft IP core is based on a generic, highly modular architecture from which a variety of solutions can be easily created to effectively and efficiently address customers’ specific requirements. The HIP 3300 Serial RapidIO IP solution is a complete high-performance core that incorporates a logical layer, a transport layer, and a physical layer according to the RapidIO specification ver 2.0.1. HIP 3300 IP core also supports I/O and message-passing. The core provides the Serial RapidIO interface on one side and ARM's AMBA 3 AXI, high performance interface, on the other side of the core, allowing flexible and high performance communication with host CPU. Modular design of the IP core allows easy implementation of add-on third party bus interfaces and/or other standard bus interface.

HIP3300 IP Core Key Features:

HIP3300 Serial RapidIO Features:The Serial RapidIO soft IP core is ideal for use in a variety of communication applications including base stations, edge routers, RNCs, enterprise switches, and other devices requiring a high-speed interface. It can also be incorporated into high-end embedded compute applications.
HDL DH has been member of RapidIO Trade Association since February 2008.

HDL DH offers a number of foundry-independent IP cores available for embedded, networking, communications, and computing applications. HDL DH provides, as part of the IP licensing package, an extensive set of documentation and customer support capabilities. The IP package consists of Verilog RTL code and detailed design documentations. HDL DH also offers a suite of design services for customization and integration of the IP cores into each customer’s ICs and FPGAs.
HDL DH also provides a variety of verification solutions including Serial RapidIO protocols. The Serial RapidIO verification solution may be part of HIP 3300 soft IP core delivery, depending on customer requirements.

Upon request, new customers may use all HDL DH IP cores free of charge during the evaluation period.

The HIP 3300 IP core will be available in Q3/2009.

If you are interested in finding out more about the HIP 3300 IP core, please visit www.hdl-dh.com or download the datasheet from the following link: http://www.hdl-dh.com/ipproducts.html

About HDL Design House:

HDL Design House delivers leading-edge design and verification services and products in numerous areas of SoC and complex FPGA designs. The company develops IP cores and provides complete design and verification services for complex SoC projects. The company also delivers component (VITAL) models for major SoC product developers. Dedicated to fulfilling each customer's unique requirements, HDL Design House has established a reputation as a reliable partner with high-quality products and services, flexible licensing models, competitive pricing and responsible technical support. The company enables customers to concentrate on system-level work and be confident that the various system components have been fully and reliably engineered and tested.

Founded in 2001, HDL Design House has 62 employees in two design centers – in Belgrade and Cuprija (Serbia). The company was awarded ISO 9001:2000 and ISO 27001:2005 certifications in December 2006 and has achieved certifications from Direct Assessment Services (DAS), thereby meeting United Kingdom Accreditation Service (UKAS) regulatory requirements. With ISO 27001:2005 certification, the highest certification standard for information security available, HDL Design House becomes the first company in Serbia to comply with this standard. In 2006 the company was awarded the SME Exporter of the Year by Serbia Investment and Export Promotion Agency (SIEPA).


Milena Jovanovic
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phone: +381(0)11 303 98 25
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