Tuscany Design Automation’s Tego Physical Design Software Accelerates Structured Design

Design Automation Conference, SAN FRANCISCO, CA, July 27, 2009 – Tuscany Design Automation, the leader in structured placement and visualization solutions for integrated circuit (IC) design, focuses on providing ease of collaboration, access and implementation to design teams and managers. At DAC 2009, the company’s Tego structured design accelerator demonstrates how rich and extensive visualization and rapid “what-if” analysis accelerate existing physical design flows for CPU/DSP cores and other blocks using a structured design methodology.

As process nodes shrink, aggressive performance and power requirements become increasingly difficult to achieve. Tego’s structured design methodology puts a powerful new tool in the engineering arsenal, giving designers a high productivity alternative to full-custom design. Based on Badger, Tuscany Design’s high-performance platform, Tego includes an option for integrated timing and power analysis that allow engineers to quickly perform sophisticated what-if analysis on the design using intuitive graphical manipulation. Engineers using Tego develop intelligent, reusable, and durable physical structures, often realizing a surprising range of benefits:

·    Deterministic design closure. With performance, power and area as primary objectives, another key value is that structured physical designs generally follow a systematic and predictable path to closure. Closure usually comes faster than by traditional techniques involving more trial-and-error.

·    Optimal and balanced design metrics. Control, comprehensible physical designs and visibility to make tradeoffs enable simultaneous convergence on speed, power and area requirements.

·    Reusable physical intellectual property (IP). Tego enables rapid porting of a structured physical design to other libraries or process nodes, giving designers not only reusable RTL IP but also highly differentiated and durable IP in the physical domain.

“Tego’s structured approach gives designers excellent control over physical design, enabling predictability within existing schedules and resource utilization,” said Dan Ellsworth, VP of Operations at Tuscany Design. “Customers have been able to achieve 25-40% improvement in power, maintaining or even improving performance, all without disrupting an existing design flow.”

Tego works with all standard place-and-route tools, creating a quick and seamless interface. From a gate-level netlist, the engineer is able to specify relative placement constraints and optimize placement of blocks. This placement is exported to existing physical design tools using a scripting-level interface. Tuscany Design customers are successfully using Tego with Cadence, IBM, Magma and Synopsys place-and-route flows.

“Structured methodologies in the past have largely been text- and command-driven," said Volker Gierenz, senior engineer at Catena Radio Design. "That can make complex structures impractical, plus you've got long cycles to analyze what you're doing. Tego visualizes a design, let's you see incremental “what-ifs,” and provides analysis tools to optimize power, timing and area. Coming up on Tego was fast, and we have used it extensively in datapath-intensive design and module generation. I've been pleased with the results and the support.”

Tego has the advantage of either operating in the same data environment as Tuscany Dashboard, Tuscany Design’s solution to provide web-based collaboration and visualization of full-chip physical design data, or independently. Both are being demonstrated in Booth #3955 at the 46th Design Automation Conference in San Francisco from Monday, July 27th until Thursday, July 30th, 2009.


Pricing and Availability

Tego is in production now. US pricing begins at $120,000 per license year. For additional detail, please contact Email Contact.


About Tuscany Design Automation

Tuscany Design Automation develops and markets structured placement and visualization solutions for integrated circuit (IC) design that helps engineers achieve higher performance chips—such as microprocessors, graphics, DSP designs – at 65nm, 45nm, and below. The company’s technology provides web-enabled collaboration, access and implementation to the various groups and disciplines in the design team, helping them to better manage, optimize and reliably close designs. Tuscany Design also accelerates existing physical design flows by providing extensive visualization and rapid what-if analysis for CPU/DSP, cores, and other blocks using a structured design methodology. Tuscany Design is based in Fort Collins, Colorado, with offices in Silicon Valley. For additional information, see www.tuscanyda.com


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Editorial Contact:

Cayenne Communication LLC

Linda Marchant, +1-919-451-0776, Email Contact





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