TSMC Reference Flow 10.0 Includes Apache’s RedHawk, Totem, and Sentinel Tools
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TSMC Reference Flow 10.0 Includes Apache’s RedHawk, Totem, and Sentinel Tools

SAN JOSE, Calif. — (BUSINESS WIRE) — July 22, 2009 Apache Design Solutions, the technology leader in power and noise integrity for chip, package, and system convergence, today announced that TSMC Reference Flow 10.0 includes Apache’s RedHawk System-on-Chip (SoC) dynamic power, Totem analog/mixed-signal power and noise integrity, and Sentinel chip-package-system co-design solutions. Apache’s products were qualified for power and thermal analysis of System-in-Package (SiP) and stacked-die designs with Through Silicon Via (TSV). Also included is substrate noise analysis for SoC and mixed-signal designs. Specifically, Reference Flow 10.0 includes Apache’s advanced solutions:

The demands for higher performance and lower system cost are driving the need for advanced packaging technologies such as SiP / 3DIC which require concurrent analysis of multiple die and package. RedHawk-NX has been architected to handle multi-die simulation via CPM model creation and utilization. PakSi-E provides fast and accurate RLCK model of the package for SiP simulation. User can analyze and optimize the global power delivery network with consideration of the die-to-die power coupling noise.

For 45nm process node and below, managing the interaction of chip power and package heat dissipation becomes a critical challenge for system thermal integrity. Specifically, temperature dependent leakage becomes an important component of total chip power. Sentinel-TI with RedHawk generated CTM provides chip-package thermal co-analysis. Users can analyze thermal profile of multiple die and package to ensure the thermal integrity of system.

With increasing integration of digital, analog, and RF contents in SoC, substrate coupling noise between digital logic and precision analog components becomes an important design constraint. Totem-SE provides accurate multi-layer substrate network extraction and full-chip concurrent simulation of digital and analog power/ground/bulk networks. User can analyze the impact of power and substrate noise coupling to help assess the effectiveness of various guard ring structures.

“TSMC and Apache have been collaborating for over six years to meet the deep sub-micron design challenges of mutual customers,” said Tom Quan, deputy director of Design Service Marketing at TSMC. “In Reference Flow 10.0, Apache provides emerging solutions for managing power, thermal, and substrate integrity for SiP/multi-die, SoC, and mixed-signal designs.”

“Our collaboration with TSMC enables us to define practical methodology for emerging power and noise issues,” said Dian Yang, senior vice president of product management at Apache. “This foundry relationship is important for us to deliver a timely solution to help customers meet their latest design challenges such as the upcoming SiP technology.”

About Apache Design Solutions

Apache delivers the industry’s leading global power and noise analyses platform solutions for Chip-Package-System convergence. Apache's innovative platforms address the unique power and noise challenges associated with specific design domains such as SoC (digital), analog and custom IP, and System (IC package, SiP, PCB), while providing a co-analysis environment that integrates the SoC and System worlds. From early-stage to sign-off, Apache’s products are adopted by over 100 customers including 90% of the top IDM, fabless semiconductor, and foundries for cost reduction, risk mitigation, and time-to-market improvements. Apache is a global company with over 150 employees and R&D centers and direct sales / support offices worldwide. For more information, visit www.apache-da.com.

Apache Design Solutions, CPM, NSPICE, RedHawk, PakSI-E, PsiWinder, Sahara, Sentinel, Totem, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.


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