Srikanth Chandrasekaran to Receive Accellera's 2009 Technical Excellence Award at DVCon on Wednesday, February 25, 2009, Doubletree Hotel, San Jose, California

NAPA, CA -- (MARKET WIRE) -- Feb 24, 2009 -- Accellera, the electronics industry organization focused on electronic design automation standards, has selected Srikanth Chandrasekaran, Manager, Design Technology, of Freescale, as the 2009 recipient of its 6th annual Technical Excellence Award. The Award honors Mr. Chandrasekaran's leadership of Accellera's Verilog Analog Mixed-Signal (AMS) Technical Subcommittee (TSC) and his contributions to Accellera's Verilog AMS standard. Accellera's chair, Shrenik Mehta, will present the Award at 3:15pm on Wednesday, February 25 at the organization's Design and Verification Conference and Exhibition ( DVCon) at the Doubletree hotel in San Jose, California before the EDA: Dead or Alive panel.

Accellera's Verilog AMS standard benefits users by allowing them to describe and simulate analog and mixed-signal designs using a top-down design methodology as well as traditional bottom up approaches.

"Sri Chandra has been one of the leading contributors to Accellera's efforts to develop a Verilog AMS standard," noted Shrenik Mehta, Accellera's chair. "He has led our AMS Technical Subcommittee and as a result of his leadership and contributions, we have a strong standard today."

"It is an honor to be recognized by Accellera for my work on Accellera's AMS standard," said Srikanth Chandrasekaran. "Our standard is a reality due to the efforts of our Technical Subcommittee members, who are driven by the goal to improve the productivity of AMS designers and the quality of mixed-signal designs."

About Srikanth Chandrasekaran

Mr. Chandrasekaran has been associated with Freescale Semiconductor (formerly the semiconductor division of Motorola Inc.) and has been part of its Design Technology organization for the past 14 years. He has been actively driving the Verilog AMS language development and standardization efforts for the past six years as Accellera Technical Subcommittee chair. He holds a Bachelor of Science degree in Physics from Madras University, India and a Master of Engineering degree in electrical communication from the Indian Institute of Science, Bangalore, India.

More about the Accellera AMS Standard

The Verilog AMS standard supports AMS designs at three levels: transistor/gate, transistor/gate-RTL/behavioral and mixed transistor/gate-RTL/behavioral circuit levels. Moreover, Verilog AMS provides powerful structural and behavioral modeling capabilities for systems in which the effects of and interactions among different disciplines like electrical, mechanical and thermal are important.

To participate in the Accellera AMS Technical Sub-Committee efforts, please visit

About Accellera's Technical Excellence Award and Technical Subcommittees

Each year, Accellera's Technical Excellence Award recognizes the outstanding achievements of a Technical Subcommittee member. Candidates are nominated by the industry at large, and nominations are endorsed by participants in Accellera's Technical Subcommittees. All of Accellera Technical Subcommittee members are eligible for the award.

Accellera's Technical Subcommittees produce effective and efficient standards for today's advanced IC designs. Participation comes from Accellera member companies, industry contributors and independents. Technical contributors typically have many years of practical experience with IC design and developing and using EDA tools.

About Accellera

Accellera provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera's partnership with the IEEE, Accellera standards are provided to the IEEE Standards Association for formalization and ongoing change control. For more information about Accellera, please visit

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