Synopsys, Powerchip and Nikon Collaborate on 42-nm Flash Memory Optimization

MOUNTAIN VIEW, Calif., Feb. 24 /PRNewswire/ -- Proteus ProGen Models Combined with Nikon Scanner Signature Files (NSSF) Offer Increased Model Accuracy

MOUNTAIN VIEW, Calif., Feb. 24 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced a joint collaboration with Powerchip and Nikon to deploy the Nikon Scanner Signature Files (NSSF) as a means to increase Proteus ProGen model accuracy on 42-nanometer (nm) flash memory designs. The NSSF parameters provide factory-averaged empirical data from the illumination source, lens and stage, which ports directly into Proteus ProGen models to capture the unique scanner signatures. Some or all of these parameters can be deployed to provide increased model accuracy for critical designs, like memory cells, with little to no impact on optical proximity correction (OPC) runtime. The migration from ideal to empirical scanner parameters enables enhanced physical modeling and progression to future technology nodes in which customized or aggressive off-axis illumination is common with memory processes.

"We expect the stepper-specific NSSF parameters can provide the additional modeling accuracy required in this highly competitive memory market," said Nelson Lai, OPC department manager for the Nano-Printing Technology Group at Powerchip, a Taiwan-based manufacturer of memory products and foundry services. "This NSSF collaboration will be instrumental in increasing yield for our unique 42-nanometer flash memory and in future designs."

"We are committed to providing regular progressions in modeling accuracy to equip our customers with the tools necessary to increase yield in highly competitive markets," said J. Tracy Weed, director of marketing for the Silicon Engineering Group at Synopsys. "Our strong collaboration with Nikon has been very effective in our drive toward sub-nanometer model accuracy by creating a more physical system."

"By incorporating proprietary Nikon scanner information into the Proteus software, customers can gain a competitive advantage through improved OPC accuracy and faster optimization time," said Toshikazu Umatate, operating officer and general manager, Development Headquarters, Precision Equipment Company, Nikon Corporation. "Through this collaboration with Synopsys we have been able to show clear benefits to our customers."

This phase of NSSF deployment is the latest milestone in an ongoing collaboration between Synopsys and Nikon to develop the required model accuracy value links between OPC software and Nikon hardware.

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Forward-Looking Statements

This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected benefits of the collaboration with Powerchip and Nikon. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, engineering difficulties and other risks as identified in the section of Synopsys' Annual Report on Form 10-K for the fiscal year ended October 31, 2008, and subsequent forms 10-Q, entitled "Risk Factors."

Synopsys is a registered trademark of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

    Editorial Contacts:
    Sheryl Gulizia
    Synopsys, Inc.
    650-584-8635
    sgulizia@synopsys.com

    Lisa Gillette-Martin
    MCA, Inc.
    650-968-8900 x115
    lgmartin@mcapr.com

Web site: http://www.synopsys.com/




Review Article Be the first to review this article
Featured Video
Editorial
Peggy AycinenaWhat Would Joe Do?
by Peggy Aycinena
Computer History Museum: the Future of War is Here
More Editorial  
Jobs
Senior SW Developer for EDA Careers at San Jose, CA
REVISED***Director Product Line RF/IC for EDA Careers at San Jose, CA
Upcoming Events
“Empowering Leadership with WIT and WISDOM” at SEMI 673 South Milpitas Blvd. Milpitas CA - Nov 28, 2017
Artificial Intelligence and Convolution Neural Networks Discussion at San Jose State University Student Union Theater San Jose CA - Dec 4, 2017
Silicon Valley's Only Comprehensive Embedded Systems Conference at San Jose Convention Center 150 W. San Carlos St. San Jose CA - Dec 5 - 7, 2017
Oski Technology’s Decoding Formal Club Meeting at The Conference Center San Jose CA - Dec 7, 2017



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise