Satin IP Technologies to deliver first public demonstrations of VIP Lane in the US

MONTPELLIER, France, June 2nd, 2008 – Following up on the launch of VIP Lane last year, Satin IP Technologies will deliver first public demonstrations of its Design-For-Reuse Assistant in the United States, during the Design Automation Conference in Anaheim, CA (June 9-12).

VIP Lane is an innovative Design-For-Reuse software assistant, enabling semiconductor companies to deploy standard and proprietary design-for-reuse practices via the intranet, for facilitated IP quality closure and with no overheads for the design teams.

Being configurable to the IP design rules and EDA flows that companies have in place, VIP Lane answers requirements coming from the three parties typically involved in design methodology deployment: a) the Design Methodology Experts, interested to deploy best design practices with maximum chances of adoption by design teams, b) the Designers willing to work in compliance with corporate quality rules while avoiding intrusion and overheads of another design tool, and c) the Project Managers targeting IP quality closure on schedule despite all design dynamics.

The latest version of the product offers a new and intuitive user interface and wider support of public EDA tools.

The company’s CEO, Michel Tabusse comments: "By using VIP Lane to formalize, capture and monitor a large set of engineering parameters that will eventually impact IP quality and reusability, our existing customers target better productivity throughout IP design teams, faster adoption of best design practices, lower integration risk and on-the-fly quality reporting even before design completion.”

Editors interested in learning more about Satin IP Technologies and VIP Lane are invited to visit the company’s booth at the show, or to contact Michel Tabusse to arrange an appointment (Tel +33 (0)467 13 00 87).

About Satin IP Technologies

Satin IP Technologies is a privately held company with offices in Montpellier, France. The company was founded in 2006 by EDA (Electronic Design Automation) professionals with decades of experience in the development and sales of implementation and verification IP. Satin IP Technologies develops and licenses VIP Lane, a Design-For-Reuse software assistant targeted to designers of reusable Semiconductor IP blocks. The company expects VIP Lane to make “Design for Reuse” and “Core-Based Design” easier and more productive activities for IP and SoC designers. Visit Satin IP Technologies online at http://www.satin-ip.com.



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