The NetEffect IC design is a complex set of pipelined state machines that implement the full set of IETF-approved iWARP extensions to TCP/IP for both 10GbE and 1GbE. The various protocols can run simultaneously to provide application acceleration for networking, storage and clustering traffic. This low-power, high-performance design and a compressed timeline proved to be challenging for both the design and verification processes.
Breker Verification Systems was selected to assist NetEffect in the verification process because of the efficiencies incorporated in Breker’s Trek technology. Trek utilizes graph-based Coverage Models to automate the generation of self-checking scenarios and sequences needed to meet NetEffect’s functional verification requirements.
NetEffect Design Process
At NetEffect, the design and verification processes incorporated a number of tools and methodologies including SystemC for behavioral modeling, RTL implementation and FPGA verification. Trek was initially used in the early stages of verification to ensure the integrity of NetEffect’s SystemC behavioral models. In this process, Trek’s Coverage Models were incrementally created, supplying test cases to the existing testbench with scenarios ranging from simple tests to concurrent packet streams that stressed the boundaries of the design.
As design progressed to RTL implementation, the Trek user was able to reuse the SystemC verification environment and the associated Coverage Models for verification. This eliminated significant delays typically associated with re-creating the verification environment for the RTL.
Because Trek Coverage Models can be reused in vertical and horizontal testbench applications, Breker customers typically realize a 95% reuse factor for these Models. With each Coverage Model applied to different environments, additional constraints can be added to reflect specific application-based design goals.
“In both the SystemC and RTL verification efforts, Breker’s Trek product was able to help us find deep state functional bugs quickly and efficiently,” said Terry Hulett, VP of Engineering at NetEffect. “The engineering team continues to ‘Brekerize’ the latest design revisions.”
With the assistance of Breker tools, NetEffect received fully functional first silicon on time. The design returned from the foundry, and within three days of receiving silicon, network packets were running through the design, exercising the targeted functionality. This is the design that NetEffect is distributing in production lots today.
Breker Verification Systems is an EDA (electronic design automation) company that is bridging the gap between verification planning and the testbench using Coverage Model-Based Functional Test Synthesis. Breker has created a functional test synthesis tool used to develop functional verification tests for complex designs. This solution makes the process of understanding, defining and analyzing complicated verification requirements easy and systematic, using a visual graph based verification plan. By generating tests directly from the plan, the tool reduces verification effort by 11-14x while guaranteeing 100% verification plan coverage. Visit www.brekersystems.com for more information.
NetEffect is a network connectivity solutions company providing high-performance, low-power multi-gigabit accelerated Ethernet products. Using a unique patented architecture, NetEffect products deliver the highest Ethernet performance in the industry while dramatically reducing latency and networking overhead on host processors for a wide range of data center applications. A single NetEffect adapter handles all data communications traffic – networking, storage, and clustering saving space, power, and simplifying deployment and infrastructure. NetEffect products are fully compatibility with existing Ethernet infrastructure in any data center. Visit http://www.neteffect.com for more information.