Cadence Design Systems and Mentor Graphics Win DesignVision Award for Open Verification Methodology

SANTA CLARA, CA -- (MARKET WIRE) -- Feb 05, 2008 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) and Mentor Graphics Corp. (NASDAQ: MENT) today announced that the Open Verification Methodology (OVM), developed jointly by the two companies, was awarded the Best Design Verification Tool DesignVision award by the International Engineering Consortium (IEC). DesignVision awards are given to pay tribute to the best design verification technology in the semiconductor industry. The OVM was also recently awarded a "2007 BEST" award for EDA technology from Electronic Design Magazine.

"The DesignVision award recognizes the innovation and industry impact of the Open Verification Methodology, which has been downloaded by hundreds of companies in just its first few weeks," said Michal Siwinski, group marketing director for Advanced Verification at Cadence. "The OVM is already seeing great interest and praise, and we expect its success to continue to grow during the remainder of 2008."

"As the first open, language-interoperable, SystemVerilog verification methodology in the industry, the OVM represents a major step forward in protecting our customers' investment in verification," said Robert Hum, vice president and general manager of Mentor Graphics Design, Verification and Test Business Unit. "We are pleased that the OVM has been honored with this award for the solutions it provides."

The OVM, based on IEEE Std. 1800™-2005 SystemVerilog standard, provides a methodology and accompanying library that allow users to create modular, reusable verification environments in which components communicate with each other via standard transaction-level modeling interfaces. It also enables intra- and inter-company reuse through a common methodology and classes for virtual sequences and block-to-system reuse, and full integration with other languages commonly used in production flows. Distributed under the standard open-source Apache™ 2.0 license, the OVM source code, documentation, and use examples may be downloaded free of charge from

About Cadence

Cadence enables global electronic-design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2007 revenues of approximately $1.6 billion, and has approximately 5,300 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at

About Mentor Graphics

Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of over $825 million and employs approximately 4,300 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site:

Cadence is a trademark of Cadence Design Systems in the United States and other countries. All other trademarks are the property of their respective owners.

Mentor Graphics is a registered trademark of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.


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For more information, please contact:

Carole Thurman
Mentor Graphics
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Doron Aronson
Cadence Design Systems, Inc.
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