STARC Adding Sequence Power-Gating Analysis to Advanced Design Flow

SANTA CLARA, Calif.—(BUSINESS WIRE)—June 4, 2007— Sequence Design, the EDA leader in power-aware SoC design solutions, today announced its CoolTime-PGA (Power Gating Analysis) will be added to the Japanese Semiconductor Technology Academic Research Center (STARC) advanced design flow, STARCAD-CEL.

STARCAD-CEL addresses the challenges of very advanced process technologies including 65nm, 45nm and 32nm. The STARCAD-CEL design methodology is shared amongst the top Japanese semiconductor companies that comprise STARC's membership as a standard digital design platform.

According to Nobuyuki Nishiguchi, vice president and general manager, Development Department-1 at STARC, CoolTime-PGA's rush current and wakeup time analysis for MTCMOS designs achieved near-perfect correlation with SPICE simulations in a mere fraction of the time. "CoolTime-PGA is a fast, accurate analysis engine that will be a fine complement to other outstanding technologies in the STARCAD-CEL flow."

CoolTime offers a fast "what-if" PGA capability that enables users to rapidly determine switch turn-on sequence to control peak rush current and minimize wake-up time. Rush current analysis examines the peak current required by a gated block as it turns on, and calculates the impact of this current on the power grid to other active sections of the chip. Wake-up time analysis determines how long it takes for instances in the power-gated block to reach the nominal supply voltage and be function and timing ready. CoolTime's PGA capability provides "what-if" rush current and wake-up time analysis results within an hour instead of the days consumed by conventional methods.

STARC is a research consortium of major Japanese semiconductor companies developing leading-edge system-on-chip (SoC) design methodologies. For more information: www.starc.jp/index-e.html

About Sequence

Sequence Design accelerates the ability of SoC designers to bring high-performance, power-aware ICs quickly to market. Sequence Design-For-Power solutions give customers the competitive advantage necessary to excel in aggressive technology markets. For more information: sequencedesign.com.

All trademarks mentioned herein are the property of their respective owners.

Contact:

Sequence Public Relations
Jim Lochmiller, 541-821-3438
Email Contact




Review Article Be the first to review this article
Aldec

Featured Video
Jobs
Senior R&D Engineer...Timing Closure Specialist for EDA Careers at San Jose or Anywhere, CA
Senior Methodology Automation Engineer for EDA Careers at San Jose, CA
DDR 3-4-5 Developer with VIP for EDA Careers at San Jose, CA
Senior Front-End RTL Design AE for EDA Careers at San Jose, CA
Proposal Support Coordinator for Keystone Aerial Surveys at Philadelphia, PA
Upcoming Events
11th International Conference on Verification and Evaluation of Computer and Communication Systems at 1455 DeMaisonneuve W. EV05.139 Montreal Quebec Canada - Aug 24 - 25, 2017
The Rise of Mechatronics at Dassault Systèmes San Diego 5005 Wateridge Vista Drive San Diego CA - Sep 12, 2017
The Rise of Mechatronics at Buca di Beppo - Pasadena 80 West Green Street Pasadena CA - Sep 13, 2017
S2C: FPGA Base prototyping- Download white paper



Internet Business Systems © 2017 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy