Verific's HDL Component Software Propels RocketDrive from GateRocket

BEDFORD, Mass. & ALAMEDA, Calif.—(BUSINESS WIRE)—May 9, 2007— GateRocket(TM) Inc. today announced it selected Verific Design Automation's hardware description language (HDL) Component Software to serve as the front end to the newly launched RocketDrive(TM) Device Native(TM) verification solution for advanced FPGAs.

The HDL Component Software from Verific includes SystemVerilog, Verilog and VHDL parsers, analyzers and elaborators. It is used in a variety of Electronic Design Automation (EDA) tools for exploring, navigating, analyzing, documenting and modifying large designs, both field programmable gate array (FPGA) and application specific integrated circuit (ASIC) or application specific standard product (ASSP). Written in platform-independent C++, the software compiles on Solaris, HP-UX, Linux and Windows platforms. All products are licensed as source code and come with online support and maintenance.

The RocketDrive Device Native verification solution is powered by the speed of hardware, the accuracy of the true chip behavior and the unbounded scalability of a system prototype. RocketDrive exhaustively validates and tests an FPGA design before committing to production, enabling shorter product development times, higher product quality and improved performance. GateRocket has integrated Verific's HDL Component Software with RocketDrive to provide the most comprehensive and compatible HDL language coverage and robustness for the user community.

"I've worked with Verific and know the team to be highly competent and customer focused, while offering the best-in-class HDL software," remarks Dave Orecchio, GateRocket's president and chief executive officer. "It was an easy choice for us. We are offering the best solution to address an acute debugging and verification problem and Verific is the only EDA tool provider that can meet our rigorous requirements."

Adds Michiel Ligthart, Verific's chief operating officer: "GateRocket has identified a critical situation and is delivering an innovative and flexible solution. We are delighted to have been chosen as the RTL front end for RocketDrive."

About GateRocket

GateRocket, Inc. offers the Electronic Design Automation industry's first Device Native verification solution for advanced FPGA semiconductor devices to the global electronics marketplace. The RocketDrive enables companies to verify designs faster and with higher quality. See GateRocket on-line at www.GateRocket.com to learn more, and visit the company's FPGA verification Blog at http://www.DeviceNative.com. Corporate headquarters is located at: 19 Crosby Drive, Suite 100, Bedford, Massachusetts 01730. Telephone: +1 (781) 908-0082. Facsimile number: +1 (781) 240-0082.

About Verific Design Automation

Verific Design Automation was founded in 1999 by electronic design automation (EDA) industry veteran Rob Dekker. It develops and sells C++ source code-based SystemVerilog, Verilog and VHDL front ends -- parsers, analyzers and elaborators -- as well as a generic hierarchical netlist database for EDA applications. Verific's technology has been licensed in many applications, combined shipping more than 45,000 end-user copies. Corporate headquarters is located at: 1516 Oak Street, Suite 115, Alameda, Calif. 94501. Telephone: (510) 522-1555. Facsimile number: (510) 522-1553. Email: info@verific.com. Website: www.verific.com

GateRocket, RocketDrive and Device Native are trademarks of GateRocket Inc. GateRocket and Verific Design Automation acknowledge trademarks or registered trademarks of other organizations for their respective products and services.

Contact:

Public Relations for GateRocket
Jim Lochmiller, 541-821-3438
Email Contact
or
Public Relations for Verific
Nanette Collins, 617-437-1822
Email Contact




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